U-Boot SPL 2023.04-lf_v2023.04+g49b102d988 (Nov 21 2023 - 07:28:53 +0000) DDRINFO: start DRAM init DDRINFO: DRAM rate 4000MTS DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done SEC0: RNG instantiated Normal Boot Trying to boot from BOOTROM Boot Stage: Primary boot image offset 0x8000, pagesize 0x200, ivt offset 0x0 NOTICE: Do not release JR0 to NS as it can be used by HAB NOTICE: BL31: v2.8(release):android-14.0.0_1.0.0-rc1-1-g08e9d4eef NOTICE: BL31: Built : 06:43:30, Nov 21 2023
CPU: i.MX8MP[8] rev1.1 1800 MHz (running at 1200 MHz) CPU: Commercial temperature grade (0C to 95C) at 25C Reset cause: POR Model: NXP i.MX8MPlus LPDDR4 EVK board DRAM: 6 GiB TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C2 0x50] SNK.Power3.0 on CC1 PDO 0: type 0, 5000 mV, 3000 mA [E] PDO 1: type 0, 9000 mV, 3000 mA [] PDO 2: type 0, 12000 mV, 3000 mA [] PDO 3: type 0, 15000 mV, 3000 mA [] PDO 4: type 0, 20000 mV, 3000 mA [] PDO 5: type 3, undefined Requesting PDO 4: 20000 mV, 2250 mA Source accept request PD source ready! tcpc_pd_receive_message: Polling ALERT register, TCPC_ALERT_RX_STATUS bit faile2 Power supply on USB2 TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C1 0x50] Core: 257 devices, 36 uclasses, devicetree: separate MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment
[*]-Video Link 0adv7535_mipi2hdmi adv7535@3d: Can't find cec device id=0x3c fail to probe panel device adv7535@3d fail to get display timings probe video device failed, ret -19
[0] lcd-controller@32e80000, video [1] mipi_dsi@32e60000, video_bridge [2] adv7535@3d, panel adv7535_mipi2hdmi adv7535@3d: Can't find cec device id=0x3c fail to probe panel device adv7535@3d fail to get display timings probe video device failed, ret -19 In: serial Out: serial Err: serial SEC0: RNG instantiated switch to partitions #0, OK mmc1 is current device flash target is MMC:1 Net: eth0: ethernet@30be0000, eth1: ethernet@30bf0000 [PRIME] Fastboot: Normal Normal Boot Hit any key to stop autoboot: 0 Working FDT set to 43000000 libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND starting USB... Bus usb@38100000: Failed to initialize board for imx8m USB probe failed, error -62 Bus usb@38200000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@38200000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found
Device 0: unknown device switch to partitions #0, OK mmc1 is current device Scanning mmc 1:1... 86911 bytes read in 14 ms (5.9 MiB/s) Working FDT set to 43000000 Unable to open OP-TEE session (err=-5) mm_communicate failed! Error: Cannot initialize UEFI sub-system, r = 3 switch to partitions #0, OK mmc2(part 0) is current device Scanning mmc 2:1... 64669 bytes read in 1 ms (61.7 MiB/s) Working FDT set to 43000000 Error: Cannot initialize UEFI sub-system, r = 3 Running BSP bootcmd ... switch to partitions #0, OK mmc1 is current device Failed to load 'boot.scr' 32856576 bytes read in 372 ms (84.2 MiB/s) Booting from mmc ... 86911 bytes read in 4 ms (20.7 MiB/s) ## Flattened Device Tree blob at 43000000 Booting using the fdt blob at 0x43000000 Working FDT set to 43000000 clk usb_phy_root_clk already disabled Using Device Tree in place at 0000000043000000, end 000000004301837e Working FDT set to 43000000 adv7535_mipi2hdmi adv7535@3d: Can't find cec device id=0x3c fail to probe panel device adv7535@3d fail to get display timings probe video device failed, ret -19
5 Sending a USB PD message The general steps of transmitting a SOP* message are listed below. Please consult sections 4.7.1, 4.7.2, and 4.7.3 of the TCPC specification[3] for more detailed implementation and examples. • Step 0: TCPM writes the content of the message to be transmitted into the TRANSMIT_BUFFER • Step 1: TCPM writes to TRANSMIT requesting SOP* transmission • Step 2: The outcome reported by the TCPC may be one of three indications after asserting the Alert# pin: – If the TCPC PHY layer successfully transmits the message, the TCPC sets the Transmission Successful bit in the ALERT register. – If the TCPC PHY layer did not get any response after retries, the TCPC sets the Transmission Failed bit in the ALERT register. – If the transmission was discarded due to an incoming message, the TCPC sets the Transmission Discarded bit in the ALERT register. • Step 3: Before requesting another transmission, the TCPM shall clear the alert by writing a 1 to the asserted bit in the ALERT register. When transitioning through the steps of transmitting SOP* message, TCPC may assert ALERT.ReceiveStatus or ALERT.ReceivedHardReset bit at any time to notify that a message was received.
4.7 USB PD Communication Operational Model 4.7.1 Transmitting an SOP* USB PD Message with Less than or Equal to 128 Data Bytes 4.7.2 Transmitting an SOP* USB PD Message with Greater than 128 Data Bytes 4.7.3 Transmitting a Hard Reset Message