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Four I2C modes
– Master transmit
– Master receive
– Slave transmit
– Slave receive  

마스터 모드 - master가 slave로 전송 / slave가 master로 부터 받기

마스터 모드 - slave가 master로 전송 / master가 slave로 부터 받기

슬레이브 모드 - slave가 master로 전송 / master가 slave로 부터 받기

슬레이브 모드 - master가 slave로 전송 / slave가 master로 부터 받기 

#define I2C_MASTER_CMD_SINGLE_SEND                                            \

                                0x00000007

#define I2C_MASTER_CMD_SINGLE_RECEIVE                                         \

                                0x00000007

#define I2C_MASTER_CMD_BURST_SEND_START                                       \

                                0x00000003

#define I2C_MASTER_CMD_BURST_SEND_CONT                                        \

                                0x00000001

#define I2C_MASTER_CMD_BURST_SEND_FINISH                                      \

                                0x00000005

#define I2C_MASTER_CMD_BURST_SEND_STOP                                        \

                                0x00000004

#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP                                  \

                                0x00000004

#define I2C_MASTER_CMD_BURST_RECEIVE_START                                    \

                                0x0000000b

#define I2C_MASTER_CMD_BURST_RECEIVE_CONT                                     \

                                0x00000009

#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH                                   \

                                0x00000005

#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP                               \

                                0x00000004

#define I2C_MASTER_CMD_QUICK_COMMAND                                          \

                                0x00000027

#define I2C_MASTER_CMD_HS_MASTER_CODE_SEND                                    \

                                0x00000013

#define I2C_MASTER_CMD_FIFO_SINGLE_SEND                                       \

                                0x00000046

#define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE                                    \

                                0x00000046

#define I2C_MASTER_CMD_FIFO_BURST_SEND_START                                  \

                                0x00000042

#define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT                                   \

                                0x00000040

#define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH                                 \

                                0x00000044

#define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP                             \

                                0x00000004

#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START                               \

                                0x0000004a

#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT                                \

                                0x00000048

#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH                              \

                                0x00000044

#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP                          \

                                0x00000004

#define I2C_O_MCS               0x00000004  // I2C Master Control/Status 

void

I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd)

{

    //

    // Check the arguments.

    //

    ASSERT(_I2CBaseValid(ui32Base));

    ASSERT((ui32Cmd == I2C_MASTER_CMD_SINGLE_SEND) ||

           (ui32Cmd == I2C_MASTER_CMD_SINGLE_RECEIVE) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_START) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_CONT) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_FINISH) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_ERROR_STOP) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_START) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_CONT) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_FINISH) ||

           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP) ||

           (ui32Cmd == I2C_MASTER_CMD_QUICK_COMMAND) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_SINGLE_SEND) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_START) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_CONT) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH) ||

           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP) ||

           (ui32Cmd == I2C_MASTER_CMD_HS_MASTER_CODE_SEND));

    //

    // Send the command.

    //

    HWREG(ui32Base + I2C_O_MCS) = ui32Cmd;

} 

I2C_MASTER_CMD_BURST_SEND_CONT 0x00000001

I2C_MASTER_CMD_BURST_SEND_START 0x00000003

I2C_MASTER_CMD_BURST_SEND_STOP 0x00000004

I2C_MASTER_CMD_BURST_SEND_ERROR_STOP 0x00000004

I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP 0x00000004

I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP 0x00000004

I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP 0x00000004

I2C_MASTER_CMD_BURST_SEND_FINISH 0x00000005

I2C_MASTER_CMD_BURST_RECEIVE_FINISH 0x00000005

I2C_MASTER_CMD_SINGLE_SEND 0x00000007

I2C_MASTER_CMD_SINGLE_RECEIVE 0x00000007

I2C_MASTER_CMD_BURST_RECEIVE_CONT 0x00000009

I2C_MASTER_CMD_BURST_RECEIVE_START 0x0000000b

I2C_MASTER_CMD_HS_MASTER_CODE_SEND 0x00000013

I2C_MASTER_CMD_QUICK_COMMAND 0x00000027

I2C_MASTER_CMD_FIFO_BURST_SEND_CONT 0x00000040

I2C_MASTER_CMD_FIFO_BURST_SEND_START 0x00000042

I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH 0x00000044

I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH 0x00000044

I2C_MASTER_CMD_FIFO_SINGLE_SEND 0x00000046

I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE 0x00000046

I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT 0x00000048

I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START 0x0000004a 

#define I2C_O_MBLEN             0x00000030  // I2C Master Burst Length

#define I2C_O_MBCNT             0x00000034  // I2C Master Burst Count 

#define I2C_MCS_BURST           0x00000040  // Burst Enable 

GLvoid display(GLvoid)

{

  glDrawBuffer(GL_BACK);                                   //draw into both back buffers

  glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);      //clear color and depth buffers

  glDrawBuffer(GL_BACK_LEFT);                              //draw into back left buffer

  glMatrixMode(GL_MODELVIEW);

  glLoadIdentity();                                        //reset modelview matrix

  gluLookAt(-IOD/2,                                        //set camera position  x=-IOD/2

            0.0,                                           //                     y=0.0

            0.0,                                           //                     z=0.0

            0.0,                                           //set camera "look at" x=0.0

            0.0,                                           //                     y=0.0

            screenZ,                                       //                     z=screenplane

            0.0,                                           //set camera up vector x=0.0

            1.0,                                           //                     y=1.0

            0.0);                                          //                     z=0.0

  glPushMatrix();

  {

    glTranslatef(0.0, 0.0, depthZ);                        //translate to screenplane

    drawscene();

  }

  glPopMatrix();

  glDrawBuffer(GL_BACK_RIGHT);                             //draw into back right buffer

  glMatrixMode(GL_MODELVIEW);

  glLoadIdentity();                                        //reset modelview matrix

  gluLookAt(IOD/2, 0.0, 0.0, 0.0, 0.0, screenZ,            //as for left buffer with camera position at:

            0.0, 1.0, 0.0);                                //                     (IOD/2, 0.0, 0.0)

  glPushMatrix();

  {

    glTranslatef(0.0, 0.0, depthZ);                        //translate to screenplane

    drawscene();

  }

  glPopMatrix();

  glutSwapBuffers();

} 

The default framebuffer contains up to 4 color buffers, named GL_FRONT_LEFT, GL_BACK_LEFT, GL_FRONT_RIGHT, and GL_BACK_RIGHT. The left and right buffers are used for stereoscopic rendering. 

void display(void)

{

glClear(GL_COLOR_BUFFER_BIT);

glMatrixMode(GL_MODELVIEW); //GL_PROJECTION

glPushMatrix();

glViewport(0, 0, 250, 250); 

gluLookAt(0.10, 0.0, 0.2, 0.0, 0.0, -2.0, 0.0, 1.0, 0.0);

draw_sin();

glPopMatrix();

glPushMatrix();

glViewport(250, 0, 250, 250); 

gluLookAt(0.2, 0.0, 0.2, 0.0, 0.0, -2.0, 0.0, 1.0, 0.0);

draw_sin();

glPopMatrix();

glutSwapBuffers();

} 

Case 1: Slave has an interrupt pin

You need to connect this interrupt pin to master microcontroller. Every time the slave has some data, it should raise an interrupt. At that point, master will read the available data.

Case 2: Slave doesn't have an interrupt pin

Polling is the only option in this case. Master keeps reading all the slaves at regular interval and keeps comparing the received data with old one. If the data has changed, master will take appropriate action. You need to decide the interval according to your application. 

Arbitration in SMBus

Although conceptually a single-master bus, a slave device that supports the "host notify protocol" acts as a master to perform the notification. It seizes the bus and writes a 3-byte message to the reserved "SMBus Host" address (0x08), passing its address and two bytes of data. When two slaves try to notify the host at the same time, one of them will lose arbitration and need to retry.

An alternative slave notification system uses the separate SMBALERT# signal to request attention. In this case, the host performs a 1-byte read from the reserved "SMBus Alert Response Address" (0x0c), which is a kind of broadcast address. All alerting slaves respond with a data bytes containing their own address. When the slave successfully transmits its own address (winning arbitration against others) it stops raising that interrupt. In both this and the preceding case, arbitration ensures that one slave's message will be received, and the others will know they must retry.

SMBus also supports an "address resolution protocol", wherein devices return a 16-byte "universal device ID" (UDID). Multiple devices may respond; the one with the least UDID will win arbitration and be recognized.