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Timing Name = 640 x 480 @ 60Hz;

Hor Pixels = 640; // Pixels

Ver Pixels = 480; // Lines

Hor Frequency = 31.469; // kHz = 31.8 usec / line

Ver Frequency = 59.940; // Hz = 16.7 msec / frame

Pixel Clock = 25.175; // MHz = 39.7 nsec ± 0.5%

Character Width = 8; // Pixels = 317.8 nsec

Scan Type = NONINTERLACED; // H Phase = 2.0 %

Hor Sync Polarity = NEGATIVE; // HBlank = 18.0% of HTotal

Ver Sync Polarity = NEGATIVE; // VBlank = 5.5% of VTotal

Hor Total Time = 31.778; // (usec) = 100 chars = 800 Pixels

Hor Addr Time = 25.422; // (usec) = 80 chars = 640 Pixels

Hor Blank Start = 25.740; // (usec) = 81 chars = 648 Pixels

Hor Blank Time = 5.720; // (usec) = 18 chars = 144 Pixels

Hor Sync Start = 26.058; // (usec) = 82 chars = 656 Pixels

// H Right Border = 0.318; // (usec) = 1 chars = 8 Pixels

// H Front Porch = 0.318; // (usec) = 1 chars = 8 Pixels

Hor Sync Time = 3.813; // (usec) = 12 chars = 96 Pixels

// H Back Porch = 1.589; // (usec) = 5 chars = 40 Pixels

// H Left Border = 0.318; // (usec) = 1 chars = 8 Pixels

Ver Total Time = 16.683; // (msec) = 525 lines HT – (1.06xHA)

Ver Addr Time = 15.253; // (msec) = 480 lines = 4.83

Ver Blank Start = 15.507; // (msec) = 488 lines

Ver Blank Time = 0.922; // (msec) = 29 lines

Ver Sync Start = 15.571; // (msec) = 490 lines

// V Bottom Border = 0.254; // (msec) = 8 lines

// V Front Porch = 0.064; // (msec) = 2 lines

Ver Sync Time = 0.064; // (msec) = 2 lines

// V Back Porch = 0.794; // (msec) = 25 lines

// V Top Border = 0.254; // (msec) = 8 lines

 Timing Name = 1280 x 960 @ 60Hz;

Hor Pixels = 1280; // Pixels

Ver Pixels = 960; // Lines

Hor Frequency = 60.000; // kHz = 16.7 usec / line

Ver Frequency = 60.000; // Hz = 16.7 msec / frame

Pixel Clock = 108.000; // MHz = 9.3 nsec ± 0.5%

Character Width = 8; // Pixels = 74.1 nsec

Scan Type = NONINTERLACED; // H Phase = 6.0 %

Hor Sync Polarity = POSITIVE; // HBlank = 28.9% of HTotal

Ver Sync Polarity = POSITIVE; // VBlank = 4.0% of VTotal

Hor Total Time = 16.667; // (usec) = 225 chars = 1800 Pixels

Hor Addr Time = 11.852; // (usec) = 160 chars = 1280 Pixels

Hor Blank Start = 11.852; // (usec) = 160 chars = 1280 Pixels

Hor Blank Time = 4.815; // (usec) = 65 chars = 520 Pixels

Hor Sync Start = 12.741; // (usec) = 172 chars = 1376 Pixels

// H Right Border = 0.000; // (usec) = 0 chars = 0 Pixels

// H Front Porch = 0.889; // (usec) = 12 chars = 96 Pixels

Hor Sync Time = 1.037; // (usec) = 14 chars = 112 Pixels

// H Back Porch = 2.889; // (usec) = 39 chars = 312 Pixels

// H Left Border = 0.000; // (usec) = 0 chars = 0 Pixels

Ver Total Time = 16.667; // (msec) = 1000 lines HT – (1.06xHA)

Ver Addr Time = 16.000; // (msec) = 960 lines = 4.1

Ver Blank Start = 16.000; // (msec) = 960 lines

Ver Blank Time = 0.667; // (msec) = 40 lines

Ver Sync Start = 16.017; // (msec) = 961 lines

// V Bottom Border = 0.000; // (msec) = 0 lines

// V Front Porch = 0.017; // (msec) = 1 lines

Ver Sync Time = 0.050; // (msec) = 3 lines

// V Back Porch = 0.600; // (msec) = 36 lines

// V Top Border = 0.000; // (msec) = 0 lines

The different modes that Advanced Timing allows end users to select are:

• Electronic Industries Alliance (EIA-861B) refers to a CEA/EIA standard which consists of display timing and formats supported by Digital Televisions
• Generalized Timing Formula (GTF) is a method of generating industry standard timings used by a wide variety of display products
• Display Monitor Timings (DMT) are a list of VESA standard pre-defined timings which are commonly used within the Computer industry.
• Coordinated Video Timings (CVT) were released on March 2003 as the newest VESA standard for generating display timings
• Coordinated Video Timings-Reduced Blanking (CVT-RB) is geared specifically for non-CRT display devices. CVT-RB offers reduced horizontal and vertical blanking periods and allows a lower pixel clock rate and higher frame rates.
• EDID Timing is the preferred timing standard defined by the display's Extended Display Identification Data (EDID) value. EDID is a standard data structure that defines the display device's configuration data and mode support which allows optimum use of the display 

The standard was adopted in 2002 and superseded the Generalized Timing Formula. 

 타이밍 모드

 표준

 CEA/EIA-861B

 ???

 GTF 

 1999

 DMT

 2007 (Version 1.0 Rev 0.11)

 CVT 

 2002 (Version 1.0 Rev 0.9)

 CVT-RB

 2007 (Version 1.0 Rev 0.11)

 EDID 

 1996 (Version 1.0 Rev 0.4)

he standard was adopted in 1999, and was superseded by the Coordinated Video Timings specification in 2002. 

"VGA industry standard" 640x480 pixel mode

Clock frequency 25.175 MHz

Line  frequency 31469 Hz

Field frequency 59.94 Hz

One line

  8 pixels front porch

96 pixels horizontal sync

 40 pixels back porch

  8 pixels left border

640 pixels video

  8 pixels right border

---

800 pixels total per line

One field

  2 lines front porch

  2 lines vertical sync

 25 lines back porch

  8 lines top border

480 lines video

  8 lines bottom border

---

525 lines total per field               

Pins 1 through 9 carry the three TMDS data channels (Transition Minimized Differential Signaling – the technology that allows DVI and HDMI to send high-speed digital data), three pins per channel. TMDS data includes both video and audio information, and each channel has three separate lines for + values, - values, and a ground or data shield.

Pins 10 through 12 carry data for the TMDS clock channel, which helps keep the signals in synchronization. As with the TMDS data channels, there are separate lines for + values, - values, and a data shield.

Pin 13 is carries the CEC (Consumer Electronics Control) channel, used for sending command and control data between connected devices.

Pin 14 is reserved for future use.

Pins 15 and 16 are dedicated to the DDC (Display Data Channel), used for communicating EDID (Extended Display Identification Channel) information between devices.

Pin 17 is a data shield for the CEC and DDC channels.

Pin 18 carries a low-voltage (+5V) power supply.

Pin 19 is the Hot Plug Detect, dedicated to monitoring power up/down and plug/unplug events. 

Basics

 HDMI leverages on the successful transition minimized differential signaling (TMDS) technology. The differential signals are +3.3 Volts, terminated in 50 Ω with nominal amplitude transitions of 500 mV (+2.8 V to +3.3 V). The voltage swing can vary from 150 mV to 800 mV. The signals have rise times of the order of 100 ps 

6.2.2 Video Control Signals : HSYNC, VSYNC

During the Data Island period, HDMI carries HSYNC and VSYNC signals using encoded bits on Channel 0. During Video Data periods, HDMI does not carry HSYNC and VSYNC and the Sink should assume that these signals remain constant. During Control periods, HDMI carries HSYNC and VSYNC signals through the use of four different control characters on TMDS Channel 0. 

A VGA video signal contains 5 active signals:

• horizontal sync: digital signal, used for synchronisation of the video

• vertical sync: digital signal, used for synchronisation of the video

• red (R): analog signal (0-0.7 v), used to control the color

• green (G): analog signal (0-0.7 v), used to control the color

• blue (B): analog signal (0-0.7 v), used to control the color