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Synchronization bits (동기화 비트)

Synchronization bits 는 2개 혹은 3개의 특수한 비트로 전송되는 데이터 패킷의 시작과 끝을 알립니다. 위 그림에서 start bit, stop bit가 해당됩니다. Start bit 는 1 bit, stop bit 는 1~2 bit 로 설정할 수 있습니다. (일반적으로 stop bit는 1bit를 사용)

Start bit 는 idle 상태(데이터 전송이 없는 상태)에서 active 상태로의 변화(1–>0)로 표시되며 stop 비트는 반대로 idle 상태로 변화함(1)을 의미합니다.

The Model 33 used the seven-bit upper-case only ASCII code, also known as CCITT International Telegraphic Alphabet No. 5, with one (even) parity bit and two stop bits. The Model 33 is usually geared to run at maximum speed ten characters per second speed, i.e., 100 words per minute (wpm), but other speeds are available: 60 wpm, 66 wpm, 68.2 wpm, and 75 wpm.[9] There were also many typewheel options. The Teletype Parts Bulletin[10] lists sixty-nine available Model 33 typewheel options. 

Case 1: Slave has an interrupt pin

You need to connect this interrupt pin to master microcontroller. Every time the slave has some data, it should raise an interrupt. At that point, master will read the available data.

Case 2: Slave doesn't have an interrupt pin

Polling is the only option in this case. Master keeps reading all the slaves at regular interval and keeps comparing the received data with old one. If the data has changed, master will take appropriate action. You need to decide the interval according to your application. 

Arbitration in SMBus

Although conceptually a single-master bus, a slave device that supports the "host notify protocol" acts as a master to perform the notification. It seizes the bus and writes a 3-byte message to the reserved "SMBus Host" address (0x08), passing its address and two bytes of data. When two slaves try to notify the host at the same time, one of them will lose arbitration and need to retry.

An alternative slave notification system uses the separate SMBALERT# signal to request attention. In this case, the host performs a 1-byte read from the reserved "SMBus Alert Response Address" (0x0c), which is a kind of broadcast address. All alerting slaves respond with a data bytes containing their own address. When the slave successfully transmits its own address (winning arbitration against others) it stops raising that interrupt. In both this and the preceding case, arbitration ensures that one slave's message will be received, and the others will know they must retry.

SMBus also supports an "address resolution protocol", wherein devices return a 16-byte "universal device ID" (UDID). Multiple devices may respond; the one with the least UDID will win arbitration and be recognized. 

GAL : Generic Logic Array

PAL :  Programmable Array Logic

PLD : Programmable Logic Device

CPLD : Complex Programmable Logic Device

FPGA : Field Programmable Gate Array