구차니의 잡동사니 모음

int compare (const void *first, const void *second)

{

    if (*(unsigned char*)first > *(unsigned char*)second)

        return 1;

    else if (*(unsigned char*)first < *(unsigned char*)second)

        return -1;

    else 

        return 0;

}

void CLottoDlg::OnButton1() 

{

// TODO: Add your control notification handler code here

int idx;

unsigned char flag[45];

unsigned char genval = 0;

CString *strarray[42] =

{

&m_edit1,&m_edit2,&m_edit3,&m_edit4,&m_edit5,&m_edit6,

&m_edit7,&m_edit8,&m_edit9,&m_edit10,&m_edit11,&m_edit12,

&m_edit13,&m_edit14,&m_edit15,&m_edit16,&m_edit17,&m_edit18,

&m_edit19,&m_edit20,&m_edit21,&m_edit22,&m_edit23,&m_edit24,

&m_edit25,&m_edit26,&m_edit27,&m_edit28,&m_edit29,&m_edit30,

&m_edit31,&m_edit32,&m_edit33,&m_edit34,&m_edit35,&m_edit36,

&m_edit37,&m_edit38,&m_edit39,&m_edit40,&m_edit41,&m_edit42

};

unsigned char row[42];

memset(flag, 0x00, sizeof(unsigned char) * 45);

srand(time(NULL));

for(idx = 0 ;idx < 30;idx++)

{

do

{

genval = rand() % 45;

}

while(flag[genval] != 0);

flag[genval] = 1;

row[idx] = genval;

}

for(idx = 0; idx < 5; idx++)

{

qsort(row + (idx * 6), 6, sizeof(char), compare);

}

for(idx = 0; idx < 30; idx++)

{

strarray[idx]->Format("%d",row[idx] + 1);

}

UpdateData(FALSE);

} 

# replace N with the number of cores you want to keep using

maxcpus=N 

arm_freq Frequency of the ARM CPU in MHz. The default value is 700.

core_freq Frequency of the GPU processor core in MHz. It has an impact on CPU performance, since it drives the L2 cache. The default value is 250.

sdram_freq Frequency of the SDRAM in MHz. The default value is 400.

gpu_freq Sets core_freq, h264_freq, isp_freq, and  v3d_freq together. The default value is 250.

h264_freq Frequency of the hardware video block in MHz. The default value is 250.

isp_freq Frequency of the image sensor pipeline block in MHz. The default value is 250.

v3d_freq Frequency of the 3D block in MHz. The default value is 250.

arm_freq_min Minimum value of arm_freq used for dynamic frequency clocking. The default value is 700.

core_freq_min Minimum value of core_freq used for dynamic frequency clocking. The default value is 250.

sdram_freq_min Minimum value of sdram_freq used for dynamic frequency clocking. The default value is 400.

$ cpufreq-info

cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009

Report errors and bugs to cpufreq@vger.kernel.org, please.

analyzing CPU 0:

  driver: BCM2835 CPUFreq

  CPUs which run at the same hardware frequency: 0 1 2 3

  CPUs which need to have their frequency coordinated by software: 0 1 2 3

  maximum transition latency: 355 us.

  hardware limits: 600 MHz - 900 MHz

  available frequency steps: 600 MHz, 900 MHz

  available cpufreq governors: conservative, ondemand, userspace, powersave, performance

  current policy: frequency should be within 600 MHz and 900 MHz.

                  The governor "ondemand" may decide which speed to use

                  within this range.

  current CPU frequency is 600 MHz.

$ cat /boot/config.txt

#uncomment to overclock the arm. 700 MHz is the default.

#arm_freq=800

arm_freq_min=300

$ cpufreq-info

cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009

Report errors and bugs to cpufreq@vger.kernel.org, please.

analyzing CPU 0:

  driver: BCM2835 CPUFreq

  CPUs which run at the same hardware frequency: 0 1 2 3

  CPUs which need to have their frequency coordinated by software: 0 1 2 3

  maximum transition latency: 355 us.

  hardware limits: 300 MHz - 900 MHz

  available frequency steps: 300 MHz, 900 MHz

  available cpufreq governors: conservative, ondemand, userspace, powersave, performance

  current policy: frequency should be within 300 MHz and 900 MHz.

                  The governor "ondemand" may decide which speed to use

                  within this range.

  current CPU frequency is 300 MHz.

  cpufreq stats: 300 MHz:16.33%, 900 MHz:83.67%  (7)

$ cat /boot/config.txt

arm_freq=600

arm_freq_min=100

$ cpufreq-info

cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009

Report errors and bugs to cpufreq@vger.kernel.org, please.

analyzing CPU 0:

  driver: BCM2835 CPUFreq

  CPUs which run at the same hardware frequency: 0 1 2 3

  CPUs which need to have their frequency coordinated by software: 0 1 2 3

  maximum transition latency: 355 us.

  hardware limits: 100.0 MHz - 600 MHz

  available frequency steps: 100.0 MHz, 600 MHz

  available cpufreq governors: conservative, ondemand, userspace, powersave, performance

  current policy: frequency should be within 100.0 MHz and 600 MHz.

                  The governor "ondemand" may decide which speed to use

                  within this range.

  current CPU frequency is 600 MHz.

  cpufreq stats: 100.0 MHz:0.00%, 600 MHz:100.00% 

void CLottoDlg::OnButton1() 

{

// TODO: Add your control notification handler code here

int idx;

unsigned char flag[45];

unsigned char genval = 0;

CString *strarray[42] =

{

&m_edit1,&m_edit2,&m_edit3,&m_edit4,&m_edit5,&m_edit6,

&m_edit7,&m_edit8,&m_edit9,&m_edit10,&m_edit11,&m_edit12,

&m_edit13,&m_edit14,&m_edit15,&m_edit16,&m_edit17,&m_edit18,

&m_edit19,&m_edit20,&m_edit21,&m_edit22,&m_edit23,&m_edit24,

&m_edit25,&m_edit26,&m_edit27,&m_edit28,&m_edit29,&m_edit30,

&m_edit31,&m_edit32,&m_edit33,&m_edit34,&m_edit35,&m_edit36,

&m_edit37,&m_edit38,&m_edit39,&m_edit40,&m_edit41,&m_edit42

};

memset(flag, 0x00, sizeof(unsigned char) * 45);

srand(time(NULL));

for(idx = 0 ;idx < 42;idx++)

{

do

{

genval = rand() % 45;

}

while(flag[genval] != 0);

flag[genval] = 1;

strarray[idx]->Format("%d",genval + 1);

}

UpdateData(FALSE);

} 

# nand scrub

NAND scrub: device 0 whole chip

Warning: scrub option will erase all factory set bad blocks!

         There is no reliable way to recover them.

         Use this command only for testing purposes if you

         are sure of what you are doing!

Really scrub this NAND flash? <y/N>

Erasing at 0xffe0000 -- 100% complete.

OK