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void

UARTDisable(uint32_t ui32Base)

{

    //

    // Check the arguments.

    //

    ASSERT(_UARTBaseValid(ui32Base));

    //

    // Wait for end of TX.

    //

    while(HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY)

    {

    }

    //

    // Disable the FIFO.

    //

    HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN);

    //

    // Disable the UART.

    //

    HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE |

                                      UART_CTL_RXE);

} 

9.2.2.27 GPIOPinTypeUART

Configures pin(s) for use by the UART peripheral.

Prototype:

void

GPIOPinTypeUART(unsigned long ulPort,

unsigned char ucPins)

Parameters:

ulPort is the base address of the GPIO port.

ucPins is the bit-packed representation of the pin(s).

Description:

The UART pins must be properly configured for the UART peripheral to function correctly. This

function provides a typical configuration for those pin(s); other configurations may work as well

depending upon the board setup (for example, using the on-chip pull-ups).

The pin(s) are specified using a bit-packed byte, where each bit that is set identifies the pin to

be accessed, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO

port pin 1, and so on.

Note:

This cannot be used to turn any pin into a UART pin; it only configures a UART pin for proper

operation. 

void

UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk,

                    uint32_t ui32Baud, uint32_t ui32Config)

{

    // Stop the UART.

    UARTDisable(ui32Base);

    // Set the baud rate.

    HWREG(ui32Base + UART_O_IBRD) = ui32Div / 64;

    HWREG(ui32Base + UART_O_FBRD) = ui32Div % 64;

    // Set parity, data length, and number of stop bits.

    HWREG(ui32Base + UART_O_LCRH) = ui32Config;

    // Clear the flags register.

    HWREG(ui32Base + UART_O_FR) = 0;

    // Start the UART.

    UARTEnable(ui32Base);

} 

void

UARTEnable(uint32_t ui32Base)

{

    //

    // Check the arguments.

    //

    ASSERT(_UARTBaseValid(ui32Base));

    //

    // Enable the FIFO.

    //

    HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;

    //

    // Enable RX, TX, and the UART.

    //

    HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |

                                     UART_CTL_RXE);

}