embeded/FPGA - ALTERA2018. 2. 4. 21:29

설마.. 리셋 안걸어 줘서 그런건 맞겠...지?!?!

QSYS와 SOPC 예제를 보니 이게 들어있네..

에이.. 설마.. 아니길 빌지만..

찔리는게 너무 많다...... ㅠㅠ


//=======================================================

//  Structural coding

//=======================================================


assign reset_n = 1'b1; 


sof + Run As로는 그럼 왜 돈거야?

자체적으로 리셋을 걸어주는건가?


2018.02.05

해보니.. 여전히 플래시 굽기는 실패..

도대체 머가 문제일까..


+

흐음.. 과연...?

You need change in Pin Planner:


DRAM_LDQM to DRAM_DQM[0]

DRAM_UDQM to DRAM_DQM[1]


and


DRAM_BA_0 to DRAM_BA[0]

DRAM_BA_1 to DRAM_BA[1]



And then, you can assign these pins to your Nios II as buses.


DRAM_DQM[1..0]

DRAM_BA[1..0]


You must do this because Nios II in SOPC Builder 9.1 SP2 has buses for these connections to the SDRAM  

[링크 : https://www.alteraforum.com/forum/showthread.php?t=4984]


+

전에 무시하고 지나간 사항인데..

플래시에 굽다 보니.. Run AS로 램에서 돌리는거랑은 다르게

reset vector가 EPCS로 되어 있어야 하는거 아닌가? 라는 생각이 드네

Nios® II Boot from EPCQ or EPCS in Quartus® II 13.1

Workaround/Fix

3.      Make sure the Nios II’s Reset Vector is pointing at EPCS/EPCQ Controller

[링크 : https://www.altera.com/support/support-resources/knowledge-base/solutions/rd11192013_118.html]


Nios II Processor Application Copied from EPCS Flash to RAM Using Boot Copier

The EPCS address space is not mapped into the Altera Avalon EPCS Flash Controller’s Avalon MM slaveinterface. Instead, read or write accesses are done through CSRs. Upon system reset, the EPCS device needs to be initialized before usage.

For these reasons, the EPCS controller-based boot copier is required for initializing the EPCS device and copying the Nios II application to RAM for execution.

The EPCS controller instantiates a block of boot ROM internally at its base address (offset 0x0, just before EPCS controller’s CSRs) for storing the boot copier. Nios II reset vector offset must set to EPCS controller base address, such that upon system reset the boot copier is executed first to initialize the EPCS controller and device.

[링크 : https://www.altera.com/en_US/pdfs/literature/ug/niosii_generic_booting_methods.pdf]

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