Core: Arm®32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
Memories
512 bytes of OTP memory
Up to 2 MB of flash memory organized into two banks allowing read-while-write
Up to 256+4 KB of SRAM including 64 KB of CCM (core coupled memory) data RAM
Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, compact flash/NOR/NAND memories
LCD parallel interface, 8080/6800 modes
LCD-TFT controller with fully programmable resolution (total width up to 4096 pixels, total height up to 2048 lines and pixel clock up to 83 MHz)
Chrom-ART Accelerator™ for enhanced graphic content creation (DMA2D)
STM32F469 high-performance MCUs with ARM®Cortex®-M4 core and Chrom-ART Accelerator™ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive touch screen
pc13번 언급이 있어서 확인해보니 RTC_OUT / RTC_TAMPER로 설정이 가능하다.
Tamper를 활성화 하면 RTC_OUT 에서 RTC Output on the Tamper pin이 사용 불가능해진다.
Tamper는 인터럽트가 있는걸 봐서는.. 일종의 input 으로 설정되나보다.
rtc_Tamper를 rtc out으로 쓰지 않으면, 기본으로 tamper는 disble 되는 듯
stm32f1xx_hal_rtc.c
*** Tamper configuration *** ============================ [..] (+) Enable the RTC Tamper and configure the Tamper Level using the HAL_RTCEx_SetTamper() function. You can configure RTC Tamper with interrupt mode using HAL_RTCEx_SetTamper_IT() function. (+) The TAMPER1 alternate function can be mapped to PC13
/** * @brief Initializes the RTC peripheral * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { /* Set Initialization mode */ if (RTC_EnterInitMode(hrtc) != HAL_OK) { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR;
if (hrtc->Init.OutPut != RTC_OUTPUTSOURCE_NONE) { /* Disable the selected Tamper pin */ CLEAR_BIT(BKP->CR, BKP_CR_TPE); }
/* Set the signal which will be routed to RTC Tamper pin*/ MODIFY_REG(BKP->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), hrtc->Init.OutPut); } }
stm32f1xx_hal_rtc.h
/** @defgroup RTC_output_source_to_output_on_the_Tamper_pin Output source to output on the Tamper pin * @{ */
#define RTC_OUTPUTSOURCE_NONE 0x00000000U /*!< No output on the TAMPER pin */ #define RTC_OUTPUTSOURCE_CALIBCLOCK BKP_RTCCR_CCO /*!< RTC clock with a frequency divided by 64 on the TAMPER pin */ #define RTC_OUTPUTSOURCE_ALARM BKP_RTCCR_ASOE /*!< Alarm pulse signal on the TAMPER pin */ #define RTC_OUTPUTSOURCE_SECOND (BKP_RTCCR_ASOS | BKP_RTCCR_ASOE) /*!< Second pulse signal on the TAMPER pin */
/** Initialize RTC Only */ hrtc.Instance = RTC; hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; if (HAL_RTC_Init(&hrtc) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN RTC_Init 2 */
/* USER CODE END RTC_Init 2 */
}
HAL_RTC_MspInit()을 통해
stm32f1xx_hal_rtc.c
(+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite() function. (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead() function.
/** * @brief Initializes the RTC peripheral * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { uint32_t prescaler = 0U; /* Check input parameters */ if (hrtc == NULL) { return HAL_ERROR; }
/* Check the parameters */ assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); assert_param(IS_RTC_CALIB_OUTPUT(hrtc->Init.OutPut)); assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv));
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1) #else if (hrtc->State == HAL_RTC_STATE_RESET) { /* Allocate lock resource and initialize it */ hrtc->Lock = HAL_UNLOCKED;
/** * @brief Initializes the RTC MSP. * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval None */ __weak void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc) { /* Prevent unused argument(s) compilation warning */ UNUSED(hrtc); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_RTC_MspInit could be implemented in the user file */ }
백업 레지스터에 접근할수 있도록 풀어준다. Core/Src/stm32f1xx_hal_msp.c
/** * @brief RTC MSP Initialization * This function configures the hardware resources used in this example * @param hrtc: RTC handle pointer * @retval None */ void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) { if(hrtc->Instance==RTC) { /* USER CODE BEGIN RTC_MspInit 0 */
/* USER CODE END RTC_MspInit 0 */ HAL_PWR_EnableBkUpAccess(); /* Enable BKP CLK enable for backup registers */ __HAL_RCC_BKP_CLK_ENABLE(); /* Peripheral clock enable */ __HAL_RCC_RTC_ENABLE(); /* USER CODE BEGIN RTC_MspInit 1 */
/* USER CODE END RTC_MspInit 1 */
}
}
CR_DBP_BB 라는 레지스터에 활성화 해주는것 코드 느낌. 무슨 레지스터인지 따라가긴 귀찮으니 패스
stm32f1xx_hal_pwr.c
/** * @brief Enables access to the backup domain (RTC registers, RTC * backup data registers ). * @note If the HSE divided by 128 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { /* Enable access to RTC and backup registers */ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; }
/** * @brief Disables access to the backup domain (RTC registers, RTC * backup data registers). * @note If the HSE divided by 128 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_DisableBkUpAccess(void) { /* Disable access to RTC and backup registers */ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE; }
아무튼 백업레지스터 접근이 허용되면
HAL_RTCEx_BKUPWrite() 를 통해 쓰고
HAL_RTCEx_BKUPRead() 를 통해 읽을 수 있다.
stm32f1xx_hal_rtc_ex.c
/** * @brief Writes a data in a specified RTC Backup data register. * @param hrtc: pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @param BackupRegister: RTC Backup data Register number. * This parameter can be: RTC_BKP_DRx where x can be from 1 to 10 (or 42) to * specify the register (depending devices). * @param Data: Data to be written in the specified RTC Backup data register. * @retval None */ void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data) { uint32_t tmp = 0U;
/** * @brief Reads data from the specified RTC Backup data Register. * @param hrtc: pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @param BackupRegister: RTC Backup data Register number. * This parameter can be: RTC_BKP_DRx where x can be from 1 to 10 (or 42) to * specify the register (depending devices). * @retval Read value */ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) { uint32_t backupregister = 0U; uint32_t pvalue = 0U;
1.9 Backup registers RTC_BKPxR, where x=0 to n backup registers (80 bytes), are reset when a tamper detection event occurs. These registers are powered-on by VBAT when VDD is switched off, so that they are not reset by a system reset, and their contents remain valid when the device operates in low-power mode. Note: The number “n” of backup registers depends on the product. Please refer to Table 15: Advanced RTC features.
3.7.2 System reset sources Power-on reset initializes all registers while system reset reinitializes the system except for the debug, part of the RCC and power controller status registers, as well as the backup power domain. A system reset is generated in the following cases: • Power-on reset (pwr_por_rst) • Brownout reset • Low level on NRST pin (external reset) • Independent watchdog 1 (from D1 domain) • Independent watchdog 2 (from D2 domain) • Window watchdog 1 (from D1 domain) • Window watchdog 2 (from D2 domain) • Software reset • Low-power mode security reset • Exit from Standby
/** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */
/****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors
/* Sections */ SECTIONS { /* The startup code into "FLASH" Rom type memory */ .isr_vector : { . = ALIGN(4); KEEP(*(.isr_vector)) /* Startup code */ . = ALIGN(4); } >FLASH
/* The program code and other data into "FLASH" Rom type memory */ .text : { . = ALIGN(4); *(.text) /* .text sections (code) */ *(.text*) /* .text* sections (code) */ *(.glue_7) /* glue arm to thumb code */ *(.glue_7t) /* glue thumb to arm code */ *(.eh_frame)
KEEP (*(.init)) KEEP (*(.fini))
. = ALIGN(4); _etext = .; /* define a global symbols at end of code */ } >FLASH
/* Constant data into "FLASH" Rom type memory */ .rodata : { . = ALIGN(4); *(.rodata) /* .rodata sections (constants, strings, etc.) */ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ . = ALIGN(4); } >FLASH }
$ readelf -a test.elf ELF Header: Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 Class: ELF32 Data: 2's complement, little endian Version: 1 (current) OS/ABI: UNIX - System V ABI Version: 0 Type: EXEC (Executable file) Machine: ARM Version: 0x1 Entry point address: 0x8009499 Start of program headers: 52 (bytes into file) Start of section headers: 1299152 (bytes into file) Flags: 0x5000200, Version5 EABI, soft-float ABI Size of this header: 52 (bytes) Size of program headers: 32 (bytes) Number of program headers: 4 Size of section headers: 40 (bytes) Number of section headers: 26 Section header string table index: 25
Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .isr_vector PROGBITS 08000000 001000 0001e4 00 A 0 0 1 [ 2] .text PROGBITS 080001e8 0011e8 012144 00 AX 0 0 8 [ 3] .rodata PROGBITS 08012330 013330 002338 00 A 0 0 8 [ 4] .ARM.extab PROGBITS 08014668 01622c 000000 00 W 0 0 1 [ 5] .ARM ARM_EXIDX 08014668 015668 000008 00 AL 2 0 4 [ 6] .preinit_array PREINIT_ARRAY 08014670 01622c 000000 04 WA 0 0 1 [ 7] .init_array INIT_ARRAY 08014670 015670 000004 04 A 0 0 4 [ 8] .fini_array FINI_ARRAY 08014674 015674 000004 04 A 0 0 4 [ 9] .data PROGBITS 20000000 016000 00022c 00 WA 0 0 4 [10] .bss NOBITS 20000230 016230 001b44 00 WA 0 0 8 [11] ._user_heap_stack NOBITS 20001d74 016d74 000604 00 WA 0 0 1 [12] .ARM.attributes ARM_ATTRIBUTES 00000000 01622c 000029 00 0 0 1 [13] .debug_info PROGBITS 00000000 016255 01da16 00 0 0 1 [14] .debug_abbrev PROGBITS 00000000 033c6b 0056f5 00 0 0 1 [15] .debug_aranges PROGBITS 00000000 039360 001bf8 00 0 0 8 [16] .debug_rnglists PROGBITS 00000000 03af58 0015ba 00 0 0 1 [17] .debug_macro PROGBITS 00000000 03c512 0206fd 00 0 0 1 [18] .debug_line PROGBITS 00000000 05cc0f 022fc5 00 0 0 1 [19] .debug_str PROGBITS 00000000 07fbd4 0aae1c 01 MS 0 0 1 [20] .comment PROGBITS 00000000 12a9f0 000043 01 MS 0 0 1 [21] .debug_frame PROGBITS 00000000 12aa34 008440 00 0 0 4 [22] .debug_line_str PROGBITS 00000000 132e74 000064 01 MS 0 0 1 [23] .symtab SYMTAB 00000000 132ed8 0072e0 10 24 1208 4 [24] .strtab STRTAB 00000000 13a1b8 002ffa 00 0 0 1 [25] .shstrtab STRTAB 00000000 13d1b2 00011c 00 0 0 1 Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings), I (info), L (link order), O (extra OS processing required), G (group), T (TLS), C (compressed), x (unknown), o (OS specific), E (exclude), D (mbind), y (purecode), p (processor specific)
Unwind section '.ARM' at offset 0x15668 contains 1 entry:
0x8000228 <strlen>: 0x1 [cantunwind]
Symbol table '.symtab' contains 1838 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 08000000 0 SECTION LOCAL DEFAULT 1 .isr_vector 2: 080001e8 0 SECTION LOCAL DEFAULT 2 .text 3: 08012330 0 SECTION LOCAL DEFAULT 3 .rodata 4: 08014668 0 SECTION LOCAL DEFAULT 4 .ARM.extab 5: 08014668 0 SECTION LOCAL DEFAULT 5 .ARM 6: 08014670 0 SECTION LOCAL DEFAULT 6 .preinit_array 7: 08014670 0 SECTION LOCAL DEFAULT 7 .init_array 8: 08014674 0 SECTION LOCAL DEFAULT 8 .fini_array 9: 20000000 0 SECTION LOCAL DEFAULT 9 .data 10: 20000230 0 SECTION LOCAL DEFAULT 10 .bss 11: 20001d74 0 SECTION LOCAL DEFAULT 11 ._user_heap_stack (많아서 생략)
No version information found in this file. Attribute Section: aeabi File Attributes Tag_CPU_name: "7-M" Tag_CPU_arch: v7 Tag_CPU_arch_profile: Microcontroller Tag_THUMB_ISA_use: Thumb-2 Tag_ABI_PCS_wchar_t: 4 Tag_ABI_FP_denormal: Needed Tag_ABI_FP_exceptions: Needed Tag_ABI_FP_number_model: IEEE 754 Tag_ABI_align_needed: 8-byte Tag_ABI_enum_size: small Tag_CPU_unaligned_access: v6
For ELF targets, the .type directive is used like this:
.type name , type description This sets the type of symbol name to be either a function symbol or an object symbol. There are five different syntaxes supported for the type description field, in order to provide compatibility with various other assemblers.
Because some of the characters used in these syntaxes (such as ‘@’ and ‘#’) are comment characters for some architectures, some of the syntaxes below do not work on all architectures. The first variant will be accepted by the GNU assembler on all architectures so that variant should be used for maximum portability, if you do not need to assemble your code with other assemblers.
STT_FUNC function Mark the symbol as being a function name.
STT_GNU_IFUNC gnu_indirect_function Mark the symbol as an indirect function when evaluated during reloc processing. (This is only supported on assemblers targeting GNU systems).
STT_OBJECT object Mark the symbol as being a data object.
그래서 reset 누르고 재기동 하면 ACM이 살아는 있지만 정상적으로 작동을 하지 않는건가?
If you reset the bluepill you need to pull down the D+ line for several milliseconds to let know the host that it has to start the enumeration process.
Portrait 되니 좌우가 바뀌어서 이를 위해 MX(Column Address Order) 뒤집음
MAC - 0xA8 (portait invert + bgr)- 1010 1000 (2)
landscape 처럼 방향 뒤집으려면 MX/MY를 뒤집음
아래는 부팅 로그(참조용)
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0030,len:6992 load:0x40078000,len:14292 ho 0 tail 12 room 4 load:0x40080400,len:3688 entry 0x40080678 I (29) boot: ESP-IDF v4.3 2nd stage bootloader I (29) boot: compile time 14:34:09 I (29) boot: chip revision: 3 I (32) boot_comm: chip revision: 3, min. bootloader chip revision: 0 I (39) boot.esp32: SPI Speed : 40MHz I (43) boot.esp32: SPI Mode : DIO I (48) boot.esp32: SPI Flash Size : 2MB I (53) boot: Enabling RNG early entropy source... I (58) boot: Partition Table: I (62) boot: ## Label Usage Type ST Offset Length I (69) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (76) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (84) boot: 2 factory factory app 00 00 00010000 00100000 I (91) boot: End of partition table I (95) boot_comm: chip revision: 3, min. application chip revision: 0 I (103) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=0e41ch ( 58396) map I (133) esp_image: segment 1: paddr=0001e444 vaddr=3ffb0000 size=01bd4h ( 7124) load I (136) esp_image: segment 2: paddr=00020020 vaddr=400d0020 size=47344h (291652) map I (249) esp_image: segment 3: paddr=0006736c vaddr=3ffb1bd4 size=00ec8h ( 3784) load I (251) esp_image: segment 4: paddr=0006823c vaddr=40080000 size=0c740h ( 51008) load I (277) esp_image: segment 5: paddr=00074984 vaddr=50000000 size=00010h ( 16) load I (284) boot: Loaded app from partition at offset 0x10000 I (284) boot: Disabling RNG early entropy source... I (297) cpu_start: Pro cpu up. I (297) cpu_start: Starting app cpu, entry point is 0x40081160 I (0) cpu_start: App cpu up. I (313) cpu_start: Pro cpu start user code I (313) cpu_start: cpu freq: 160000000 I (313) cpu_start: Application information: I (318) cpu_start: Project name: lvgl-demo I (323) cpu_start: App version: 1 I (327) cpu_start: ELF file SHA256: af171cc858421945... I (333) cpu_start: ESP-IDF: v4.3 I (338) heap_init: Initializing. RAM available for dynamic allocation: I (345) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM I (351) heap_init: At 3FFCFB50 len 000104B0 (65 KiB): DRAM I (357) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM I (364) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM I (370) heap_init: At 4008C740 len 000138C0 (78 KiB): IRAM I (377) spi_flash: detected chip: generic I (381) spi_flash: flash io: dio W (385) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header. I (399) cpu_start: Starting scheduler on PRO CPU. I (0) cpu_start: Starting scheduler on APP CPU.
# # LVGL TFT Display controller # CONFIG_LVGL_PREDEFINED_DISPLAY_NONE=y # CONFIG_LVGL_PREDEFINED_DISPLAY_WROVER4 is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_M5STACK is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_M5STICK is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_M5STICKC is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_ERTFT0356 is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_ADA_FEATHERWING is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_RPI_MPI3501 is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_WEMOS_LOLIN is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_ATAG is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_RPI_RA8875 is not set # CONFIG_LVGL_PREDEFINED_DISPLAY_TTGO is not set CONFIG_LVGL_TFT_DISPLAY_CONTROLLER_ILI9341=y CONFIG_LVGL_TFT_DISPLAY_PROTOCOL_SPI=y CONFIG_LVGL_PREDEFINED_PINS_NONE=y # CONFIG_LVGL_PREDEFINED_PINS_38V4 is not set # CONFIG_LVGL_PREDEFINED_PINS_30 is not set # CONFIG_LVGL_PREDEFINED_PINS_38V1 is not set # CONFIG_LVGL_PREDEFINED_PINS_TKOALA is not set CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_ILI9341=y # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_ILI9481 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_ILI9486 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_ILI9488 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_ST7789 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_ST7735S is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_HX8357 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_SH1107 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_SSD1306 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_FT81X is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_IL3820 is not set # CONFIG_LVGL_TFT_DISPLAY_USER_CONTROLLER_RA8875 is not set CONFIG_LVGL_TFT_DISPLAY_SPI_HSPI=y # CONFIG_LVGL_TFT_DISPLAY_SPI_VSPI is not set CONFIG_LVGL_DISPLAY_ORIENTATION_PORTRAIT=y # CONFIG_LVGL_DISPLAY_ORIENTATION_PORTRAIT_INVERTED is not set # CONFIG_LVGL_DISPLAY_ORIENTATION_LANDSCAPE is not set # CONFIG_LVGL_DISPLAY_ORIENTATION_LANDSCAPE_INVERTED is not set CONFIG_LVGL_DISPLAY_ORIENTATION=0 CONFIG_LVGL_DISPLAY_WIDTH=320 CONFIG_LVGL_DISPLAY_HEIGHT=240 CONFIG_LVGL_TFT_USE_CUSTOM_SPI_CLK_DIVIDER=y # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_1 is not set CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_2=y # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_3 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_4 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_5 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_6 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_7 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_8 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_9 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_10 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_12 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_16 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_20 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_24 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_32 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_40 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_48 is not set # CONFIG_LVGL_TFT_SPI_CLK_DIVIDER_80 is not set CONFIG_LVGL_TFT_CUSTOM_SPI_CLK_DIVIDER=2 # CONFIG_LVGL_INVERT_DISPLAY is not set # CONFIG_LVGL_INVERT_COLORS is not set CONFIG_LVGL_AXP192_PIN_SDA=21 CONFIG_LVGL_AXP192_PIN_SCL=22
경고: 라이브러리 ESP_SR에서 카테고리 'Sound'가 유효하지 않습니다. 'Uncategorized'로 설정 경고: 라이브러리 Hash에서 카테고리 'Security'가 유효하지 않습니다. 'Uncategorized'로 설정 경고: 라이브러리 ESP Insights에서 카테고리 ''가 유효하지 않습니다. 'Uncategorized'로 설정 경고: 라이브러리 ESP RainMaker에서 카테고리 ''가 유효하지 않습니다. 'Uncategorized'로 설정 경고: 라이브러리 TFLite Micro에서 카테고리 ''가 유효하지 않습니다. 'Uncategorized'로 설정 경고: 라이브러리 WiFiProv에서 카테고리 ''가 유효하지 않습니다. 'Uncategorized'로 설정 Archiving built core (caching) in: /tmp/arduino_cache_547584/core/core_esp32_esp32_esp32_JTAGAdapter_default,PSRAM_disabled,PartitionScheme_default,CPUFreq_240,FlashMode_dio,FlashFreq_80,FlashSize_4M,UploadSpeed_921600,LoopCore_1,EventsCore_1,DebugLevel_none,EraseFlash_none,ZigbeeMode_default_302ebf432393f02a3a54f86a94370d90.a >: -c: 줄 1: `''을(를) 찾는 도중 예상치 못한 파일의 끝 >: -c: 줄 2: 문법 오류: 예기치 않은 파일의 끝 exit status 2 보드 ESP32 Dev Module 컴파일 에러.
