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9.2.2.11 GPIOPinIntStatus

Gets interrupt status for the specified GPIO port.

Prototype:

long GPIOPinIntStatus(unsigned long ulPort, tBoolean bMasked)

Parameters:

ulPort is the base address of the GPIO port.

bMasked specifies whether masked or raw interrupt status is returned.

Description:

If bMasked is set as true, then the masked interrupt status is returned; otherwise, the raw interrupt status will be returned.

Returns:

Returns a bit-packed byte, where each bit that is set identifies an active masked or raw interrupt, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on. Bits 31:8 should be ignored. 

9.3 Programming Example

The following example shows how to use the GPIO API to initialize the GPIO, enable interrupts,

read data from pins, and write data to pins.

int iVal;
//
// Register the port-level interrupt handler. This handler is the
// first level interrupt handler for all the pin interrupts.
//
GPIOPortIntRegister(GPIO_PORTA_BASE, PortAIntHandler);
//
// Initialize the GPIO pin configuration.
//
// Set pins 2, 4, and 5 as input, SW controlled.
//
GPIOPinTypeGPIOInput(GPIO_PORTA_BASE,
GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5);
//
// Set pins 0 and 3 as output, SW controlled.
//
GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_3);
//
// Make pins 2 and 4 rising edge triggered interrupts.
//
GPIOIntTypeSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_4, GPIO_RISING_EDGE);
//
// Make pin 5 high level triggered interrupts.
//
GPIOIntTypeSet(GPIO_PORTA_BASE, GPIO_PIN_5, GPIO_HIGH_LEVEL);
//
// Read some pins.
//
iVal = GPIOPinRead(GPIO_PORTA_BASE,
(GPIO_PIN_0 | GPIO_PIN_2 | GPIO_PIN_3 |
GPIO_PIN_4 | GPIO_PIN_5));
//
// Write some pins. Even though pins 2, 4, and 5 are specified, those
// pins are unaffected by this write since they are configured as inputs.
// At the end of this write, pin 0 will be a 0, and pin 3 will be a 1.
//
GPIOPinWrite(GPIO_PORTA_BASE,
(GPIO_PIN_0 | GPIO_PIN_2 | GPIO_PIN_3 |
GPIO_PIN_4 | GPIO_PIN_5),
0xF4);
//
// Enable the pin interrupts.
//
GPIOPinIntEnable(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5);

9.2.2.4 GPIOIntTypeSet

Sets the interrupt type for the specified pin(s).

Prototype:

void GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins, unsigned long ulIntType)

Parameters:

ulPort is the base address of the GPIO port.

ucPins is the bit-packed representation of the pin(s).

ulIntType specifies the type of interrupt trigger mechanism.

Description:

This function sets up the various interrupt trigger mechanisms for the specified pin(s) on the selected GPIO port.

The parameter ulIntType is an enumerated data type that can be one of the following values:

GPIO_FALLING_EDGE

GPIO_RISING_EDGE

GPIO_BOTH_EDGES

GPIO_LOW_LEVEL

GPIO_HIGH_LEVEL

where the different values describe the interrupt detection mechanism (edge or level) and the particular triggering event (falling, rising, or both edges for edge detect, low or high for level detect).

The pin(s) are specified using a bit-packed byte, where each bit that is set identifies the pin to be accessed, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.

Note:

In order to avoid any spurious interrupts, the user must ensure that the GPIO inputs remain stable for the duration of this function.

Returns:

None.

$ cat test.c

#include <stdio.h>

int main()

{

        int *p;

        free(p);

        return 0;

} 

pi@delta ~ $ tvservice -c "PAL 4:3"; fbset -depth 8; fbset -depth 16

Powering on SDTV with explicit settings (mode:2 aspect:1)

pi@delta ~ $ tvservice -p; fbset -depth 8; fbset -depth 16

Powering on HDMI with preferred settings

[링크 : https://www.raspberrypi.org/forums/viewtopic.php?f=63&t=38020]

pi@raspberrypi ~ $ tvservice

Usage: tvservice [OPTION]...

  -p, --preferred                   Power on HDMI with preferred settings

  -e, --explicit="GROUP MODE DRIVE" Power on HDMI with explicit GROUP (CEA, DMT, CEA_3D_SBS, CEA_3D_TB, CEA_3D_FP)

                                      MODE (see --modes) and DRIVE (HDMI, DVI)

  -t, --ntsc                        Use NTSC frequency for HDMI mode (e.g. 59.94Hz rather than 60Hz)

  -c, --sdtvon="MODE ASPECT"        Power on SDTV with MODE (PAL or NTSC) and ASPECT (4:3 14:9 or 16:9)

  -o, --off                         Power off the display

  -m, --modes=GROUP                 Get supported modes for GROUP (CEA, DMT)

  -M, --monitor                     Monitor HDMI events

  -s, --status                      Get HDMI status

  -a, --audio                       Get supported audio information

  -d, --dumpedid <filename>         Dump EDID information to file

  -j, --json                        Use JSON format for --modes output

  -n, --name                        Print the device ID from EDID

  -h, --help                        Print this information 

-mmcu=architecture

Note that when only using -mmcu=architecture but no -mmcu=MCU type, including the file <avr/io.h> cannot work since it cannot decide which device's definitions to select.

Architecture Macros

avr5

AVR_ARCH=5

AVR_MEGA [5]

AVR_ENHANCED [5]

AVR_HAVE_JMP_CALL [4]

AVR_HAVE_MOVW [1]

AVR_HAVE_LPMX [1]

AVR_HAVE_MUL [1]

AVR_2_BYTE_PC [2]

avr51

AVR_ARCH=51

AVR_MEGA [5]

AVR_ENHANCED [5]

AVR_HAVE_JMP_CALL [4]

AVR_HAVE_MOVW [1]

AVR_HAVE_LPMX [1]

AVR_HAVE_MUL [1]

AVR_HAVE_RAMPZ [4]

AVR_HAVE_ELPM [4]

AVR_HAVE_ELPMX [4]

AVR_2_BYTE_PC [2]

-mmcu=MCU type

The following MCU types are currently understood by avr-gcc. The table matches them against the corresponding avr-gcc architecture name, and shows the preprocessor symbol declared by the -mmcu option. 

Architecture MCU name    Macro

avr5/avr51 [3] atmega128   __AVR_ATmega128__

#define AVR 1

#define __AVR 1

#define __AVR_ARCH__ 5

#define __AVR_ATmega128__ 1

#define __AVR_ENHANCED__ 1

#define __AVR_MEGA__ 1

#define __AVR__ 1

#define __CHAR_BIT__ 8

#define __DBL_DENORM_MIN__ 1.40129846e-45

#define __DBL_DIG__ 6

#define __DBL_EPSILON__ 1.19209290e-7

#define __DBL_HAS_INFINITY__ 1

#define __DBL_HAS_QUIET_NAN__ 1

#define __DBL_MANT_DIG__ 24

#define __DBL_MAX_10_EXP__ 38

#define __DBL_MAX_EXP__ 128

#define __DBL_MAX__ 3.40282347e+38

#define __DBL_MIN_10_EXP__ (-37)

#define __DBL_MIN_EXP__ (-125)

#define __DBL_MIN__ 1.17549435e-38

#define __DECIMAL_DIG__ 9

#define __FINITE_MATH_ONLY__ 0

#define __FLT_DENORM_MIN__ 1.40129846e-45F

#define __FLT_DIG__ 6

#define __FLT_EPSILON__ 1.19209290e-7F

#define __FLT_EVAL_METHOD__ 0

#define __FLT_HAS_INFINITY__ 1

#define __FLT_HAS_QUIET_NAN__ 1

#define __FLT_MANT_DIG__ 24

#define __FLT_MAX_10_EXP__ 38

#define __FLT_MAX_EXP__ 128

#define __FLT_MAX__ 3.40282347e+38F

#define __FLT_MIN_10_EXP__ (-37)

#define __FLT_MIN_EXP__ (-125)

#define __FLT_MIN__ 1.17549435e-38F

#define __FLT_RADIX__ 2

#define __GNUC_MINOR__ 1

#define __GNUC_PATCHLEVEL__ 0

#define __GNUC__ 4

#define __GXX_ABI_VERSION 1002

#define __INTMAX_MAX__ 9223372036854775807LL

#define __INTMAX_TYPE__ long long int

#define __INT_MAX__ 32767

#define __LDBL_DENORM_MIN__ 1.40129846e-45L

#define __LDBL_DIG__ 6

#define __LDBL_EPSILON__ 1.19209290e-7L

#define __LDBL_HAS_INFINITY__ 1

#define __LDBL_HAS_QUIET_NAN__ 1

#define __LDBL_MANT_DIG__ 24

#define __LDBL_MAX_10_EXP__ 38

#define __LDBL_MAX_EXP__ 128

#define __LDBL_MAX__ 3.40282347e+38L

#define __LDBL_MIN_10_EXP__ (-37)

#define __LDBL_MIN_EXP__ (-125)

#define __LDBL_MIN__ 1.17549435e-38L

#define __LONG_LONG_MAX__ 9223372036854775807LL

#define __LONG_MAX__ 2147483647L

#define __NO_INLINE__ 1

#define __PTRDIFF_TYPE__ int

#define __REGISTER_PREFIX__ 

#define __SCHAR_MAX__ 127

#define __SHRT_MAX__ 32767

#define __SIZE_TYPE__ unsigned int

#define __STDC_HOSTED__ 1

#define __STDC__ 1

#define __UINTMAX_TYPE__ long long unsigned int

#define __USER_LABEL_PREFIX__ 

#define __USING_SJLJ_EXCEPTIONS__ 1

#define __VERSION__ "4.1.0"

#define __WCHAR_MAX__ 32767

#define __WCHAR_TYPE__ int

#define __WINT_TYPE__ unsigned int