Stm32g0xx_hal_uart.h를 따라가면 아래와 같이 먼가 있긴 하다.(귀찮아..)
#define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
#define USART_CR2_MSBFIRST_Pos (19U) #define USART_CR2_MSBFIRST_Msk (0x1UL << USART_CR2_MSBFIRST_Pos) /*!< 0x00080000 */ #define USART_CR2_MSBFIRST USART_CR2_MSBFIRST_Msk /*!< Most Significant Bit First */
#define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */
The USART can also communicate synchronously. It can operate as a SPI in Master or Slave mode with programmable clock polarity (CPOL) and phase (CPHA) and programmable data order with MSB or LSB first. The clock is output (in case of Master mode) or input (in case of Slave mode) on the CK pin. No clock pulses are provided during the start and stop bits. When the USART is configured in SPI slave mode, it supports the Transmit underrun error and the NSS hardware or software management.