구차니의 잡동사니 모음

  │ │        [*] ARM errata: Stale prediction on replaced interworking branch               │ │   

  │ │        [*] ARM errata: Processor deadlock when a false hazard is created              │ │  

  │ │        [*] ARM errata: Data written to the L2 cache can be overwritten with stale data│ │  

  ┌ ARM errata: Stale prediction on replaced interworking branch ───────────────┐

  │ CONFIG_ARM_ERRATA_430973:                                                                 │  

  │                                                                                           │  

  │ This option enables the workaround for the 430973 Cortex-A8                               │  

  │ (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb                          │  

  │ interworking branch is replaced with another code sequence at the                         │  

  │ same virtual address, whether due to self-modifying code or virtual                       │  

  │ to physical address re-mapping, Cortex-A8 does not recover from the                       │  

  │ stale interworking branch prediction. This results in Cortex-A8                           │  

  │ executing the new code sequence in the incorrect ARM or Thumb state.                      │  

  │ The workaround enables the BTB/BTAC operations by setting ACTLR.IBE                       │  

  │ and also flushes the branch target cache at every context switch.                         │  

  │ Note that setting specific bits in the ACTLR register may not be                          │  

  │ available in non-secure mode.                                                             │  

  │                                                                                           │  

  │ Symbol: ARM_ERRATA_430973 [=y]                                                            │  

  │ Prompt: ARM errata: Stale prediction on replaced interworking branch                      │  

  │   Defined at arch/arm/Kconfig:1004                                                        │  

  │   Depends on: CPU_V7 [=y]                                                                 │  

  │   Location:                                                                               │  

  │     -> System Type                                                                        │  

  ┌ ARM errata: Processor deadlock when a false hazard is created ──────────────┐

  │ CONFIG_ARM_ERRATA_458693:                                                                 │  

  │                                                                                           │  

  │ This option enables the workaround for the 458693 Cortex-A8 (r2p0)                        │  

  │ erratum. For very specific sequences of memory operations, it is                          │  

  │ possible for a hazard condition intended for a cache line to instead                      │  

  │ be incorrectly associated with a different cache line. This false                         │  

  │ hazard might then cause a processor deadlock. The workaround enables                      │  

  │ the L1 caching of the NEON accesses and disables the PLD instruction                      │  

  │ in the ACTLR register. Note that setting specific bits in the ACTLR                       │  

  │ register may not be available in non-secure mode.                                         │  

  │                                                                                           │  

  │ Symbol: ARM_ERRATA_458693 [=y]                                                            │  

  │ Prompt: ARM errata: Processor deadlock when a false hazard is created                     │  

  │   Defined at arch/arm/Kconfig:1020                                                        │  

  │   Depends on: CPU_V7 [=y]                                                                 │  

  │   Location:                                                                               │  

  │     -> System Type                                                                        │  

  ┌ ARM errata: Data written to the L2 cache can be overwritten with stale data ───────┐

  │ CONFIG_ARM_ERRATA_460075:                                                                 │  

  │                                                                                           │  

  │ This option enables the workaround for the 460075 Cortex-A8 (r2p0)                        │  

  │ erratum. Any asynchronous access to the L2 cache may encounter a                          │  

  │ situation in which recent store transactions to the L2 cache are lost                     │  

  │ and overwritten with stale memory contents from external memory. The                      │  

  │ workaround disables the write-allocate mode for the L2 cache via the                      │  

  │ ACTLR register. Note that setting specific bits in the ACTLR register                     │  

  │ may not be available in non-secure mode.                                                  │  

  │                                                                                           │  

  │ Symbol: ARM_ERRATA_460075 [=y]                                                            │  

  │ Prompt: ARM errata: Data written to the L2 cache can be overwritten with stale data       │  

  │   Defined at arch/arm/Kconfig:1033                                                        │  

  │   Depends on: CPU_V7 [=y]                                                                 │  

  │   Location:                                                                               │  

  │     -> System Type                                                                        │  

The NEON/VFP unit comes up disabled on power on reset. To enable Neon requires some co-processor commands. Below is the assembly code required to enable NEON/VFP. It is in the gcc type syntax. ARM code tools use a slightly different syntax.

Neon and VFP both support floating point, which should I use?

The VFPv3 is fully compliant with IEEE 754

Neon is not fully compliant with IEEE 754, so it is mainly targeted for multimedia applications

[링크 : http://processors.wiki.ti.com/index.php/Cortex-A8]

A sequence for initializing the VFPU can be found in u-boot source.

.macro init_vfpu

  ldr r0, =(0xF << 20)

  mcr p15, 0, r0, c1, c0, 2

  mov r3, #0x40000000

  .long 0xeee83a10

  /* vmsr FPEXC, r3 */

.endm /* init_vfpu */

[링크 : http://stackoverflow.com/questions/19231197/enable-neon-on-arm-cortex-a-series]

Using the Advanced SIMD and VFP in Secure state and Non-secure state other than Hyp mode

To use the Advanced SIMD and VFP in Secure state and Non-secure state other than Hyp mode, you must first define the NSACR, then define the CPACR and FPEXC registers. See Non-Secure Access Control Register, Coprocessor Access Control Register, and Floating-Point Exception Register.

Kernel mode NEON

================

Introduction

------------

It is possible to use NEON instructions (and in some cases, VFP instructions) in code that runs in kernel mode. However, for performance reasons, the NEON/VFP register file is not preserved and restored at every context switch or taken exception like the normal register file is, so some manual intervention is required. Furthermore, special care is required for code that may sleep [i.e.,may call schedule()], as NEON or VFP instructions will be executed in a non-preemptible section for reasons outlined below.

[링크 : https://www.kernel.org/doc/Documentation/arm/kernel_mode_neon.txt] 

Package                Minimum ver   Installed info

-------                -----------   ---------------

glibc-devel            0             not installed

zlib                   0             not installed

zlib-devel             0             not installed

ncurses-devel          0             not installed

m4                     0             not installed

bison                  0             not installed

 559 $app_checks = {

 560     binutils         => 'ar --version 2>/dev/null',

 561     'gcc-c++'        => 'g++ --version 2>/dev/null',

 562     glibc            => 'ldd --version 2>/dev/null',

 563     'glibc-devel'    => sub { -f '/usr/lib/i386-linux-gnu/libm.so' || -f '/usr/lib/i386-linux-gnu/libz.so'},

 564     'glibc-headers'  => sub { -f '/usr/include/stdio.h' },

 565     'libstdc++' => sub {

 566             return system_nb(<<TXT) == 0;

 567 echo '#include <iostream>

 568 int main() { std::cout << "test"; }' | g++ -x c++ - -o /dev/null

 569 TXT

 570                        },

 571     lkc              => 'mconf -h 2>/dev/null',

 572     ncurses          => 'tic -V 2>/dev/null',

 573     'ncurses-devel'  => sub { -f '/usr/include/ncurses.h' },

 574     'rpm-build'      => sub { `rpmbuild --version 2>/dev/null` },

 575     sudo             => 'sudo -V 2>/dev/null',

 576     tcl              => "echo 'puts \$tcl_patchLevel' | tclsh",

 577     texinfo          => sub {

 578                        warn  "WARNING: you may also need to install:"

 579                             ." tetex-fonts, dialog and textex\n"

 580                          unless  -f '/usr/share/texmf/tex/texinfo/texinfo.tex';

 581                         `makeinfo --version 2>/dev/null`;

 582                     },

 583     zlib         => sub { my @f = (glob('/usr/lib/libz.so*'),

 584                                    glob('/lib/libz.so*'),

 585                                    glob('/lib/i386-linux-gnu/libz.so*')  ); @f > 1 ? 1 : 0 },

 586     'zlib-devel' => sub { -f '/usr/include/zlib.h' },

 587 }; 

$ sudo apt-get install libncurses-dev bison perl libwww-perl alien cvs

$ cvs -z3 -d:pserver:anonymous@cvs.savannah.nongnu.org:/sources/ltib co -P ltib

$ cd ltib

$ wget https://community.freescale.com/servlet/JiveServlet/downloadBody/93455-102-3-2835/patch-ltib-ubuntu12.04.sh

$ chmod +x patch-ltib-ubuntu12.04.sh

$ ./patch-ltib-ubuntu12.04.sh

$ sudo visudo

interm ALL = NOPASSWD: /usr/bin/rpm, /opt/ltib/usr/bin/rpm

$ ./ltib 

x86 Linux

    Redhat: 7.3, 8.0, 9.0, Enterprise release 4

    Fedora Core: 1, 2, 3, 4, 5, 8

    Debian: 3.1r0 (stable), unstable, 4.0

    Suse: 8.2, 9.1, 9.2, 10.0, 10.2, 10.3

    Ubuntu 6.10, 7.04, 7.10, 8.04

[링크 : http://ltib.org/documentation-LtibFaq]

12.13.4 USB Recovery Mode

USB boot mode is provided as a fail-safe mechanism for writing system firmware to the boot media. The boot mode is not usually entered by the normal methods of setting the boot pins or OTP, the other methods of entering USB boot mode are referred to generally as recovery mode.

An end user can manually start the recovery mode by holding the recovery switch for several seconds while plugging in USB. Holding the recovery switch is defined as reading the i.MX28 PSWITCH input as a 0x3. There are several switch circuits that will produce this input. The loader also automatically starts recovery mode if a nonrecoverableerror is detected from any boot mode other than USB. disabled completely. Attempts to enter USB boot mode through boot pins, OTP, or recovery methods will result in a chip power-down.

[링크 : http://cache.freescale.com/...=pdf&WT_ASSET=Documentation&fileExt=.pdf]

#define ERROR_DDI_SD_MMC_DEVICE_NOT_SUPPORTED (ERROR_DDI_GROUP | ERROR_DDI_SD_DRIVER_GROUP | 0x14)

0x8020A014 ?

#define ERROR_DDI_SD_MBR_NOT_FOUND (ERROR_DDI_GROUP | ERROR_DDI_SD_DRIVER_GROUP | 0x1D)

0x8020A01D ?

 /***********************************************************************

A0–A19 20 addresses

DQ0–DQ14 15 data inputs/outputs

DQ15/A-1 DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode)