embeded/Cortex-M3 Ti2015. 12. 18. 16:54

uart tx interrupt

lm3s1607 데이터 시트

TxFIFO가 있는데 이녀석에서 Transmitter로 한 바이트가 보내지면 TX 인터럽트가 떨어진다.

그런 이유로 가장 마지막 바이트가 UART를 통해 보내지는 시점에 (다음 바이트를 받기 위해) TX 인터럽트가 발생한다.

그래서 485 등을 사용시에는 TX 인터럽트 떨어졌다고 바로 TX Enable을 꺼버리면 안된다.



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embeded2015. 12. 17. 16:36

링커 스크립트 문법(ld syntax)

대충 보면 어셈인줄 알았는데.. 스크립트라네...


[링크 : http://wiki.osdev.org/Linker_Scripts]


[링크 : http://www.scoberlin.de/content/media/http/informatik/gcc_docs/ld_3.html]

[링크 : http://korea.gnu.org/manual/release/ld/ld-mahajjh/ld_3.html]

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embeded2015. 12. 17. 14:30

시리얼 저항 / 직렬 저항 / 댐핑 저항

이게 다 같은 건가?


일단 이걸 쓰는 이유는

1. 전류제한

2. 임피던스 매칭으로 노이즈 제거

3. 전압변경(좋은 방법은 아니지만)

등등등...


[링크 : http://programfrall.tistory.com/43]

[링크 : http://pcbee.tistory.com/entry/직렬series-저항-값에-대한-고찰]

[링크 : http://blog.naver.com/rlaghlfh/110127337569] 댐핑 저항

[링크 : http://www.solvline.com/technical_info/tech_note_view.php?no=24] 종단 저항(terminator)

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embeded/ARM2015. 12. 17. 13:44

jtag/swd pullup & pulldown

흐음...


pull up/down 저항이 낮아서 문제가 되려나?

[링크 : http://e2e.ti.com/support/microcontrollers/tiva_arm/f/908/p/348680/1220668]

[링크 : http://www.alteraforum.com/forum/archive/index.php/t-32059.html]



JTAG ModeSWD ModeSignalRequired pull-up / pull-down (if not implemented internally by MCU)
TCKSWCLKClock into the coreUse 10K-100K Ohm pull-down resistor to GND
TDI-JTAG Test Data InputUse 10K-100K Ohm pull-up resistor to VCC
TDOSWVJTAG Test Data Output / SWV trace data output (SWO)Use 10K-100K Ohm pull-up resistor to VCC
TMSSWDIOJTAG Test Mode Select / SWD data in/outUse 10K-100K Ohm pull-up resistor to VCC
GNDGND--

[링크 : https://www.lpcware.com/content/faq/lpcxpresso/debug-design]

[링크 : http://www.support.code-red-tech.com/CodeRedWiki/HardwareDebugConnections] 조만간 폭파


SignalConnects to...
TMSTest Mode State pin — Use 100K Ohm pull-up resistor to VCC.
TDOTest Data Out pin.
RTCKJTAG Return Test ClocK. (see Note below)
TDITest Data In pin — Use 100K Ohm pull-up resistor to VCC.
TRSTTest ReSeT/ pin — Use 100K Ohm pull-up resistor to VCC. TRST is optional and not available on some devices. You may leave it unconnected.
TCLKTest CLocK pin — Use 100K Ohm pull-down resistor to GND.
VCCPositive Supply Voltage — Power supply for JTAG interface drivers.
GNDDigital ground.
RESETRSTIN/ pin — Connect this pin to the (active low) reset input of the target CPU.
CPUCLKCPU clock (according IEEE Standard 1149.1).
OCDSEEnable/Disable OCDS interface (Infineon-specific).
TRAPTrap condition (Infineon-specific).
BRKINHardware break in (Infineon-specific).
BRKOUTHardware break out (Infineon-specific).
/JENJTAG Enable (STMicroelectronics specific).
TSTATJTAG ISP Status (STMicroelectronics specific) (optional).
/RSTChip reset (STMicroelectronics specific).
/TERRJTAG ISP Error (STMicroelectronics specific) (optional).

[링크 : http://www.keil.com/support/man/docs/ulink2/ulink2_hw_connectors.htm]

[링크 : http://forum.falinux.com/zbxe/?document_srl=796669...]

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embeded/freeRTOS2015. 12. 16. 16:25

freeRTOS stack & heap 메모리 사용량 예측

음.. 소스 레벨에서는 역시 무리이고..

돌려보고 최대로 먹는거 보면서 분할을 해줘야 하려나?


[링크 : http://www.freertos.org/FAQMem.html]

[링크 : http://www.microchip.com/forums/m590414.aspx]

    [링크 : http://sourceforge.net/p/freertos/discussion/382005/thread/33791e60/]

    [링크 : http://www.freertos.org/uxTaskGetStackHighWaterMark.html]

    [링크 : http://www.freertos.org/Stacks-and-stack-overflow-checking.html]

[링크 : http://www.freertos.org/a00111.html]

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embeded/openRISC2015. 12. 14. 13:47

or32 컴파일러.. 삽질

걍 포기할까...

LD_LIBRARY_PATH 잘못설정하면 절대 좋은꼴을 못보는데... ㄷㄷㄷ


./as: error while loading shared libraries: libz.so.1: cannot open shared object file: No such file or directory

$ sudo apt-get install zlib1g:i386

$ sudo apt-get install libc6-i386 lib32stdc++6 lib32gcc1 lib32ncurses5

[링크 : http://stackoverflow.com/questions/21256866/libz-so-1-cannot-open-shared-object-file]



/cc1: error while loading shared libraries: libmpc.so.2: cannot open shared object file: No such file or directory


export LD_LIBRARY_PATH="/usr/local/lib" sudo ldconfig


[링크 : http://stackoverflow.com/.../cc1-error-while-loading-shared-libraries-libmpc-so-2-...c]



$ sudo find / -name "libmpc.so.*"

/usr/lib/x86_64-linux-gnu/libmpc.so.2.0.0

/usr/lib/x86_64-linux-gnu/libmpc.so.2


$ sudo apt-cache search libmpc

libmpc-dev - multiple precision complex floating-point library development package

libmpc2 - multiple precision complex floating-point library

libmpcdec-dev - MusePack decoder - development files

libmpcdec6 - MusePack decoder - library

mppenc - Musepack lossy audio codec encoder


이거.. 볼수록 잘못 건드리면 헬게이트 열릴 기분인데?



as: error while loading shared libraries: libopcodes-2.23.51.20121129.so: cannot open shared object file: No such file or directory

미친척 or1k껄로 했더니 여전히 헬게이트.. 걍 포기


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embeded/ARM2015. 12. 14. 10:30

jtag과 swd

음.. JTAG없이 SWD만으로 하는데

SWD로 안되면.. 머가 문제일려나..

TCK/TMS 인식인가..?


How do I switch the debugger connection between JTAG and SWD (Serial Wire Debug) protocol?

Applies to: Debug Access Port (DAP)

Answer

The SWJ-DP component supports both protocols - Serial Wire and JTAG. The selector is part of the SWJ-DP.

The default protocol at power-up is JTAG, so if you want to use Serial Wire, you need to use the TCK and TMS pins to scan in a special 'key', which is a sequence of TMS values which has no effect for a pure JTAG TAP but is recognized by a SWJ-DP TAP as a request to switch into Serial Wire mode. Similarly, there is another another TMS sequence to switch back from SWD to JTAG protocol.


[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka11775.html]

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embeded/raspberry pi2015. 12. 12. 22:00

라즈베리 2b lirc + openELEC 설정

흐음.. 귀찮아서

pcb 뜰 능력은 안되고 대충 땜질


ir 리시버의 다리가 얇은 관계로 땜질을 고려!

대충 아깝지만.. 케이블을 잘라서!


붙이고!


어... 길이가 좀 그러네 ㅠㅠ


머.. 모양은 그런데 되면 된거지 머 ㅋㅋㅋ

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embeded/Cortex-M3 Ti2015. 12. 11. 14:31

coflash 구조 및 에러 메시지..

Can NOT Stop MCU!!

Flash driver fuction execution error



도대체.. 머가 문제인거냐...




일단 현재 수상(?) 한건

생산시기에 따른 편차가 있다는것


그리고 2014.7월에 JTAG/SWD 리셋 관련 글이 수정되었다는 점

(물론 예전 버전에도 내용은 존재함)


이래저래 벽에 막힌 기분..


coflash를 이용해서 굽는지라. 초기화 코드등은 수정하려면 할 수는 있으나..

flash 프로그램이 문제인지(elf / *.c / *.h)

xml 설정파일 쪽인지(adapter / debugger / device)

알수가 없네..


현재 의심가는건.. 

1. NVRAM의 설정에서 JTAG으로 설정되거나 SWD로 설정되는 녀석이 혼용되어

JTAG으로 설정된 녀석의 경우 SWD를 통해서 구을수 없다는 경우...


2. 내장 플래시의 문제(혹은 PLL 등?)


+

뒤지다 보니 coflash user defined algorithm이 존재!

[링크 : http://www1.coocox.org/CoFlashGuide/CoFlash_UserGuide_Algorithm.htm]




JTAG-to-SWD Switching

The 16-bit TMS/SWDIO command for switching to SWD mode is defined as b1110.0111.1001.1110, transmitted LSB first.


SWD-to-JTAG Switching

The 16-bit TMS/SWDIO command for switching to JTAG mode is defined as b1110.0111.0011.1100, transmitted LSB first.

 

7.2.3.5 Permanently Disabling Debug

 For extremely sensitive applications, the debug interface to the processor and peripherals can be permanently disabled, blocking all accesses to the device through the JTAG or SWD interfaces. With the debug interface disabled, it is still possible to perform standard IEEE instructions (such as boundary scan operations), but access to the processor and peripherals is blocked. The DBG0 and DBG1 bits of the User Debug (USER_DBG) register control whether the debug interface is turned on or off. The debug interface should not be permanently disabled without providing some mechanism–-such as the boot loader–-to provide customer-installable updates or bug fixes. Disabling the debug interface is permanent and cannot be reversed.

[링크 : http://www.ti.com/lit/ds/symlink/lm3s1607.pdf]

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embeded/openRISC2015. 12. 11. 10:19

openRISC OR1k(1000) OR1200


The OR1200 is a 32-bit scalar RISC with Harvard microarchitecture, 5 stage integer pipeline, virtual memory support (MMU) and basic DSP capabilities.

[링크 : http://opencores.org/or1k/OR1200_OpenRISC_Processor]


CPU CPUID

or1ksim 0x00

OR1200 0x12

mor1kx 0x01

AltOr32 0x32

OR10 0x10

or1knd i5 0xd5


[링크 : http://opencores.org/or1k/OR1K_CPU_Cores]




=== CPUID관련 ===


For now, we have implemented a CPU-ID register, that is SPR_SYS register 9, to allow different stacks in the same memory etc. 


[링크 : http://opencores.com/forum,OpenRISC,0,3666]


    Section 15.2

    Version Register (VR)

    The version register is a 32-bit special-purpose supervisor-level

register accessible with the l.mfspr instruction.

    It identifies the implementation (model) and version of the

OpenRISC 1000 processor.


    [31:24] VER Version

    Implementation-specific version information. This value should

increase for more recent versions. The CPU implementation

specification document should indicate how to interpret this field.


    [23:0] CPUID CPU Identification

    Implementation-specific identification number. Each unique

implementation should have a unique identification value.


[링크 : http://lists.opencores.org/pipermail/openrisc/2011-August/000090.html]


>>> +++ b/newlib/libc/machine/or1k/include/spr-defs.h

>>> @@ -201,6 +201,15 @@

>>>  #define SPR_VR2_CPUID_OFF   24

>>>  #define SPR_VR2_VER_OFF     0

>>>

>>> +/*

>>> + * CPU implementation unique identifiers

>>> + */

>>> +#define SPR_VR2_CPUID_OR1KSIM   0x00

>>> +#define SPR_VR2_CPUID_MOR1KX    0x01

>>> +#define SPR_VR2_CPUID_OR1200    0x12

>>> +#define SPR_VR2_CPUID_ALTOR32   0x32

>>> +#define SPR_VR2_CPUID_OR10      0x10

>>> +


[링크 : http://lists.opencores.org/pipermail/openrisc/2012-December/001171.html]



흐음... 0x13은 머지....

CPU0 : SPR_VR : 0x13000008

CPU1 : SPR_VR : 0x12000008


dprintf("CPU0 : SPR_VR : 0x%X\n", mfspr(SPR_VR));

#define SPR_VR (SPRGROUP_SYS + 0)


/*

 * Bit definitions for the Version Register

 *

 */

#define SPR_VR_VER 0xff000000  /* Processor version */

#define SPR_VR_CFG 0x00ff0000  /* Processor configuration */

#define SPR_VR_RES 0x0000ffc0  /* Reserved */

#define SPR_VR_REV 0x0000003f  /* Processor revision */


#define SPR_VR_VER_OFF 24

#define SPR_VR_CFG_OFF 16

#define SPR_VR_REV_OFF 0 


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