구차니의 잡동사니 모음

 lm3s1607

 lm3s811

 uart

 3

 2

 i2c

 2

 1

 timer

 4

 3

 flash / sram

 128k / 32k

 64k / 8k

 PWM

 -

 3

 adc

 8

 4

 analog comparator

 -

 1

 target

■ Remote monitoring 

■ Electronic point-of-sale (POS) machines 

■ Test and measurement equipment 

■ Network appliances and switches

■ Factory automation 

■ HVAC and building control 

■ Gaming equipment

■ Motion control

■ Medical instrumentation

■ Fire and security 

■ Power and energy 

■ Transportation

■ Factory automation and control

■ Industrial control power devices

■ Building and home automation

■ Stepper motors

■ Brushless DC motors

■ AC induction motors

#define HWREGBITW(x, b)                                                       \

        HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 |                \

              (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))

    for(ulIdx = 0; ulIdx < 32; ulIdx++)

    {

        HWREGBITW(&g_ulValue, 31 - ulIdx) = (0xdecafbad >> (31 - ulIdx)) & 1;

        PrintValue(g_ulValue);

        Delay(1);

    }

TARGET_IS_DUSTDEVIL_RA0 The application is being built to run on a DustDevil-class device, silicon revision A0.

TARGET_IS_TEMPEST_RB1 The application is being built to run on a Tempest-class device, silicon revision B1.

TARGET_IS_TEMPEST_RC1 The application is being built to run on a Tempest-class device, silicon revision C1.

TARGET_IS_TEMPEST_RC3 The application is being built to run on a Tempest-class device, silicon revision C3.

TARGET_IS_TEMPEST_RC5 The application is being built to run on a Tempest-class device, silicon revision C5.

TARGET_IS_FIRESTORM_RA2 The application is being built to run on a Firestorm-class device, silicon revision A2.

TARGET_IS_BLIZZARD_RA1 The application is being built to run on a Blizzard-class device, silicon revision A1.

[링크 : http://www.ti.com/lit/ug/spmu019p/spmu019p.pdf] 

9.2.2.11 GPIOPinIntStatus

Gets interrupt status for the specified GPIO port.

Prototype:

long GPIOPinIntStatus(unsigned long ulPort, tBoolean bMasked)

Parameters:

ulPort is the base address of the GPIO port.

bMasked specifies whether masked or raw interrupt status is returned.

Description:

If bMasked is set as true, then the masked interrupt status is returned; otherwise, the raw interrupt status will be returned.

Returns:

Returns a bit-packed byte, where each bit that is set identifies an active masked or raw interrupt, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on. Bits 31:8 should be ignored. 

9.3 Programming Example

The following example shows how to use the GPIO API to initialize the GPIO, enable interrupts,

read data from pins, and write data to pins.

int iVal;
//
// Register the port-level interrupt handler. This handler is the
// first level interrupt handler for all the pin interrupts.
//
GPIOPortIntRegister(GPIO_PORTA_BASE, PortAIntHandler);
//
// Initialize the GPIO pin configuration.
//
// Set pins 2, 4, and 5 as input, SW controlled.
//
GPIOPinTypeGPIOInput(GPIO_PORTA_BASE,
GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5);
//
// Set pins 0 and 3 as output, SW controlled.
//
GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_3);
//
// Make pins 2 and 4 rising edge triggered interrupts.
//
GPIOIntTypeSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_4, GPIO_RISING_EDGE);
//
// Make pin 5 high level triggered interrupts.
//
GPIOIntTypeSet(GPIO_PORTA_BASE, GPIO_PIN_5, GPIO_HIGH_LEVEL);
//
// Read some pins.
//
iVal = GPIOPinRead(GPIO_PORTA_BASE,
(GPIO_PIN_0 | GPIO_PIN_2 | GPIO_PIN_3 |
GPIO_PIN_4 | GPIO_PIN_5));
//
// Write some pins. Even though pins 2, 4, and 5 are specified, those
// pins are unaffected by this write since they are configured as inputs.
// At the end of this write, pin 0 will be a 0, and pin 3 will be a 1.
//
GPIOPinWrite(GPIO_PORTA_BASE,
(GPIO_PIN_0 | GPIO_PIN_2 | GPIO_PIN_3 |
GPIO_PIN_4 | GPIO_PIN_5),
0xF4);
//
// Enable the pin interrupts.
//
GPIOPinIntEnable(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5);

9.2.2.4 GPIOIntTypeSet

Sets the interrupt type for the specified pin(s).

Prototype:

void GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins, unsigned long ulIntType)

Parameters:

ulPort is the base address of the GPIO port.

ucPins is the bit-packed representation of the pin(s).

ulIntType specifies the type of interrupt trigger mechanism.

Description:

This function sets up the various interrupt trigger mechanisms for the specified pin(s) on the selected GPIO port.

The parameter ulIntType is an enumerated data type that can be one of the following values:

GPIO_FALLING_EDGE

GPIO_RISING_EDGE

GPIO_BOTH_EDGES

GPIO_LOW_LEVEL

GPIO_HIGH_LEVEL

where the different values describe the interrupt detection mechanism (edge or level) and the particular triggering event (falling, rising, or both edges for edge detect, low or high for level detect).

The pin(s) are specified using a bit-packed byte, where each bit that is set identifies the pin to be accessed, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.

Note:

In order to avoid any spurious interrupts, the user must ensure that the GPIO inputs remain stable for the duration of this function.

Returns:

None.