'Programming/neon' 카테고리의 글 목록

'Programming/neon'에 해당되는 글 7건

neon auto vectoring

arm-none-linux-gnueabi-gcc -mfpu=neon -ftree-vectorize -c vectorized.c

플래그로 tree-vectorize를 주고

소스에서 __restrict 하면 gcc에서 알아서 neon 코드를 생성해 낸다고 한다.

openmp 를 조금 해봐서 그런가..openmp의 스멜이야 ㅋㅋㅋ

$ vi auto.c

void add_ints(int * __restrict pa, int * __restrict pb, unsigned int n, int x)

{

unsigned int i;

for(i = 0; i < (n & ~3); i++)

pa[i] = pb[i] + x;

}

$ arm-linux-gnueabihf-gcc -mfpu=neon -ftree-vectorize -c auto.c

$ arm-linux-gnueabihf-objdump -D auto.o

auto.o: file format elf32-littlearm

Disassembly of section .text:

00000000 <add_ints>:

0: e52db004 push {fp} ; (str fp, [sp, #-4]!)

4: e28db000 add fp, sp, #0

8: e24dd01c sub sp, sp, #28

c: e50b0010 str r0, [fp, #-16]

10: e50b1014 str r1, [fp, #-20]

14: e50b2018 str r2, [fp, #-24]

18: e50b301c str r3, [fp, #-28]

1c: e3a03000 mov r3, #0

20: e50b3008 str r3, [fp, #-8]

24: ea00000e b 64 <add_ints+0x64>

28: e51b3008 ldr r3, [fp, #-8]

2c: e1a03103 lsl r3, r3, #2

30: e51b2010 ldr r2, [fp, #-16]

34: e0823003 add r3, r2, r3

38: e51b2008 ldr r2, [fp, #-8]

3c: e1a02102 lsl r2, r2, #2

40: e51b1014 ldr r1, [fp, #-20]

44: e0812002 add r2, r1, r2

48: e5921000 ldr r1, [r2]

4c: e51b201c ldr r2, [fp, #-28]

50: e0812002 add r2, r1, r2

54: e5832000 str r2, [r3]

58: e51b3008 ldr r3, [fp, #-8]

5c: e2833001 add r3, r3, #1

60: e50b3008 str r3, [fp, #-8]

64: e51b3018 ldr r3, [fp, #-24]

68: e3c32003 bic r2, r3, #3

6c: e51b3008 ldr r3, [fp, #-8]

70: e1520003 cmp r2, r3

74: 8affffeb bhi 28 <add_ints+0x28>

78: e24bd000 sub sp, fp, #0

7c: e49db004 pop {fp} ; (ldr fp, [sp], #4)

80: e12fff1e bx lr

Disassembly of section .comment:

00000000 <.comment>:

0: 43434700 movtmi r4, #14080 ; 0x3700

4: 6328203a teqvs r8, #58 ; 0x3a

8: 73736f72 cmnvc r3, #456 ; 0x1c8

c: 6c6f6f74 stclvs 15, cr6, [pc], #-464 ; fffffe44 <add_ints+0xfffffe44>

10: 20474e2d subcs r4, r7, sp, lsr #28

14: 616e696c cmnvs lr, ip, ror #18

18: 312d6f72 teqcc sp, r2, ror pc

1c: 2e33312e rsfcssp f3, f3, #0.5

20: 2e342d31 mrccs 13, 1, r2, cr4, cr1, {1}

24: 30322d38 eorscc r2, r2, r8, lsr sp

28: 302e3431 eorcc r3, lr, r1, lsr r4

2c: 202d2031 eorcs r2, sp, r1, lsr r0

30: 616e694c cmnvs lr, ip, asr #18

34: 47206f72 ; <UNDEFINED> instruction: 0x47206f72

38: 32204343 eorcc r4, r0, #201326593 ; 0xc000001

3c: 2e333130 mrccs 1, 1, r3, cr3, cr0, {1}

40: 20293131 eorcs r3, r9, r1, lsr r1

44: 2e382e34 mrccs 14, 1, r2, cr8, cr4, {1}

48: 30322033 eorscc r2, r2, r3, lsr r0

4c: 31303431 teqcc r0, r1, lsr r4

50: 28203630 stmdacs r0!, {r4, r5, r9, sl, ip, sp}

54: 72657270 rsbvc r7, r5, #112, 4

58: 61656c65 cmnvs r5, r5, ror #24

5c: 00296573 eoreq r6, r9, r3, ror r5

Disassembly of section .ARM.attributes:

00000000 <.ARM.attributes>:

0: 00003241 andeq r3, r0, r1, asr #4

4: 61656100 cmnvs r5, r0, lsl #2

8: 01006962 tsteq r0, r2, ror #18

c: 00000028 andeq r0, r0, r8, lsr #32

10: 06003605 streq r3, [r0], -r5, lsl #12

14: 09010806 stmdbeq r1, {r1, r2, fp}

18: 0c030a01 stceq 10, cr0, [r3], {1}

1c: 14041201 strne r1, [r4], #-513 ; 0x201

20: 17011501 strne r1, [r1, -r1, lsl #10]

24: 19011803 stmdbne r1, {r0, r1, fp, ip}

28: 1b021a01 blne 86834 <add_ints+0x86834>

2c: 1e011c03 cdpne 12, 0, cr1, cr1, cr3, {0}

30: Address 0x00000030 is out of bounds.

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0002a/ch01s04s03.html]

엥? vadd 라던가 이런류의 코드는 안보이는데 -ㅁ-?

라즈베리 파이용 컴파일러가 문제인가?

음.. 해도 안되는데 -ㅁ-? auto vertorize는 안되는건가? ㅠㅠ

-mfpu=name

This specifies what floating-point hardware (or hardware emulation) is available on the target. Permissible names are: ‘vfp’, ‘vfpv3’, ‘vfpv3-fp16’, ‘vfpv3-d16’, ‘vfpv3-d16-fp16’, ‘vfpv3xd’, ‘vfpv3xd-fp16’, ‘neon’, ‘neon-fp16’, ‘vfpv4’, ‘vfpv4-d16’, ‘fpv4-sp-d16’, ‘neon-vfpv4’, ‘fpv5-d16’, ‘fpv5-sp-d16’, ‘fp-armv8’, ‘neon-fp-armv8’, and ‘crypto-neon-fp-armv8’.

If -msoft-float is specified this specifies the format of floating-point values.

If the selected floating-point hardware includes the NEON extension (e.g. -mfpu=‘neon’), note that floating-point operations are not generated by GCC's auto-vectorization pass unless -funsafe-math-optimizations is also specified. This is because NEON hardware does not fully implement the IEEE 754 standard for floating-point arithmetic (in particular denormal values are treated as zero), so the use of NEON instructions may lead to a loss of precision.

[링크 : https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html]

[링크 : https://www.raspberrypi.org/forums/viewtopic.php?f=33&t=98354]

+

2016.03.14

-ftree-vectorizer-verbose=1

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0002a/ch01s04s03.html]

Using the Vectorizer

Vectorization is enabled by the flag -ftree-vectorize and by default at -O3. To allow vectorization on powerpc* platforms also use -maltivec. On i?86 and x86_64 platforms use -msse/-msse2. To enable vectorization of floating point reductions use -ffast-math or -fassociative-math.

-ftree-vectorizer-verbose=2

[링크 : https://gcc.gnu.org/projects/tree-ssa/vectorization.html]

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kernel mode neon support?

커널에서 설정하는 neon은..

*** At least one emulation must be selected ***

[*] VFP-format floating point maths

[ ] Advanced SIMD (NEON) Extension support

커널모드 neon 지원이려나?

도움말에는 간단하게만 써있는데

The Linux kernel configuration item CONFIG_NEON:

prompt: Advanced SIMD (NEON) Extension support

type: bool

depends on: CONFIG_VFPv3 && CONFIG_CPU_V7

defined in arch/arm/Kconfig

found in Linux kernels: 2.6.25–2.6.39, 3.0–3.19, 4.0, 4.1-rc+HEAD

Help text

Say Y to include support code for NEON, the ARMv7 Advanced SIMD Extension.

[링크 : http://cateee.net/lkddb/web-lkddb/NEON.html]

비글본 보드 쪽 글이 검색되서 보니...

커널모드 NEON 명령어 지원...?

Re: [beagleboard] Re: How to enable NEON instruction Support in the kernel

In the linux omap kernel [assuming you have already done "make ARCH=arm omap3_beagle_defconfig]

make ARCH=arm menuconfig

Under the "Floating point emulation" Select "Advanced SIMD (NEON) Extension support".

Save the configuration and exit.

Check in the .config file whether you have "CONFIG_NEON=y"

- Jesslyn

[링크 : https://groups.google.com/forum/#!topic/beagleboard/xF1gwRrUvQY]

Changes since v1:

- changed the order of the patches, so kernel_neon_begin() does not appear before the required fixes are in place

- don't use might_sleep() to enforce that kernel_neon_begin() should not be called from interrupt context, as it also prevents it from being called with preemption disabled, which is perfectly acceptable

- prefer inc_preempt_count() over preempt_disable() so sleeping after calling kernel_neon_begin() gets flagged even with kernel preemption disabled in Kconfig

- made the RAID6 patch suitable for both arm and arm64

[링크 : https://lwn.net/Articles/556398/]

[링크 : https://www.kernel.org/doc/Documentation/arm/kernel_mode_neon.txt]

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NEON instruction

GCC 쪽 문서에도 어셈블리 명령어로만 설명이 있어서

결국은 어셈블리 명령어를 먼지 알아야 겠네 -_-

기본적으로 V를 접두로 가지며 V는 Vector의 약자로 보인다.

L은 Long

The Neon Register file has a dual view:

32 - 64 bit registers (The Dx registers)

16 - 128 bit registers (The Qx registers)

The VFP Register file also has a dual view:

32 - 64 bit registers (The Dx registers)

32 - 32 bit registers (The Sx registers - Only 1/2 of the registers may be viewed as 32 bit)

[링크 : http://processors.wiki.ti.com/index.php/Cortex-A8]

Qd, Qn, Qm 쿼드워드 연산에 대한 대상 벡터, 첫 번째 피연산자 벡터 및 두 번째 피연산자 벡터입니다.

Dd, Dn, Dm 더블워드 연산에 대한 대상 벡터, 첫 번째 피연산자 벡터 및 두 번째 피연산자 벡터입니다.

Qd, Dn, Dm long 연산에 대한 대상 벡터, 첫 번째 피연산자 벡터 및 두 번째 피연산자 벡터입니다.

Qd, Qn, Dm Wide 연산에 대한 대상 벡터, 첫 번째 피연산자 벡터 및 두 번째 피연산자 벡터입니다.

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204ik/CIHJCAAG.html]

double(64bit) / float(32bit)에 이은.. 덜 정밀한(16bit) 부동소수점인가?

반정밀도 확장은 VFPv3 및 NEON 아키텍처를 모두 확장하는 선택적 아키텍처로, 단정밀도 (32비트) 및 반정밀도 (16비트) 부동 소수점 숫자 간에 변환을 수행하는 VFP 및 NEON 명령어를 제공합니다.

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204ik/CJAJBFBF.html]

128비트 쿼드워드

64비트 더블워드

32비트 워드

32개의 64비트 더블워드 레지스터, D0-D31

32개의 32비트 단일 워드 레지스터, S0-S31. 이 뷰에서는 레지스터 뱅크의 반에만 액세스할 수 있습니다.

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204ik/CIHBGCCH.html]

음.. ARMv8 부터는 64bit 확장되면서 64bit = 1word가 되나보다?

[링크 : http://en.wikipedia.org/wiki/Word_(computer_architecture)]

NEON 논리 및 비교 연산

VAND, VBIC, VEOR, VORN 및 VORR (레지스터) - 비트 단위 AND, 비트 지우기, 배타적 OR, OR Not 및 OR (레지스터)

VBIC 및 VORR (즉치값) - 비트 단위 비트 지우기 및 OR (즉치값

VBIF, VBIT 및 VBSL - False인 경우 비트 단위 삽입, True인 경우 삽입 및 선택

VMOV, VMVN (레지스터) - 이동 및 이동하지 않음

VACGE 및 VACGT - 비교 절대값

VCEQ, VCGE, VCGT, VCLE 및 VCLT - 비교

VTST - 비트 테스트

NEON 일반 데이터 처리 명령어

VCVT (고정 소수점 또는 정수와 부동 소수점 간 변환) - 고정 소수점 또는 정수와 부동 소수점 간의 벡터 변환

VCVT (반정밀도 부동 소수점과 단정밀도 부동 소수점 간에 변환) - 반정밀도 부동 소수점과 단정밀도 부동 소수점 간의 벡터 변환

VDUP - 스칼라를 벡터의 모든 레인으로 복제

VEXT - 추출

VMOV, VMVN (즉치값) - 이동 및 음수 이동 (즉치값)

VMOVL, V{Q}MOVN, VQMOVUN - 이동 (레지스터)

VREV - 벡터 내 요소 반전

VSWP - 벡터 스왑

VTBL, VTBX - 벡터 테이블 조회

VTRN - 벡터 이항

VUZP, VZIP - 벡터 인터리브 및 디인터리브

NEON 시프트 명령어

VSHL, VQSHL, VQSHLU 및 VSHLL (즉치값 기준) - 즉치값만큼 왼쪽으로 시프트

V{Q}{R}SHL (부호 있는 변수 기준) - 부호 있는 변수만큼 왼쪽으로 시프트

V{R}SHR{N}, V{R}SRA (즉치값 기준) - 즉치값만큼 오른쪽으로 시프트

VQ{R}SHR{U}N (즉치값 기준) - 즉치값만큼 오른쪽으로 시프트 및 포화

VSLI 및 VSRI - 왼쪽으로 시프트 및 삽입 및 오른쪽으로 시프트 및 삽입

NEON 일반 산술 명령어

VABA{L} 및 VABD{L} - 벡터 절대 차이, 누산 및 절대 차이

V{Q}ABS 및 V{Q}NEG - 벡터 절대값 및 부정

V{Q}ADD, VADDL, VADDW, V{Q}SUB, VSUBL 및 VSUBW - 벡터 더하기 및 빼기

V{R}ADDHN 및 V{R}SUBHN - 벡터 더하기 상위 반 선택 및 빼기 상위 반 선택

V{R}HADD 및 VHSUB - 벡터 양분 더하기 및 빼기

VPADD{L}, VPADAL - 벡터 인접 쌍 더하기, 더하기 및 누산

VMAX, VMIN, VPMAX 및 VPMIN - 벡터 최대값, 최소값, 인접 쌍 최대 값 및 인접 쌍 최소값

VCLS, VCLZ 및 VCNT - 벡터 선행 부호 비트 계산, 선행 0 수 계산 및 세트 비트 계산

VRECPE 및 VRSQRTE - 벡터 역수 추정 및 역수 제곱근 추정

VRECPS 및 VRSQRTS - 벡터 역수 추정 및 역수 제곱근 추정

NEON 곱하기 명령어

VMUL{L}, VMLA{L} 및 VMLS{L} - 벡터 곱하기, 곱하기 누산 및 곱하기 빼기

VMUL{L}, VMLA{L} 및 VMLS{L} (스칼라 기준) - 벡터 곱하기, 곱하기 누산 및 곱하기 빼기 (스칼라 기준)

VQDMULL, VQDMLAL 및 VQDMLSL (벡터 기준 또는 스칼라 기준) - 벡터 포화 배수화 곱하기, 곱하기 누산 및 곱하기 빼기 (벡터 또는 스칼라 기준)

VQ{R}DMULH (벡터 기준 또는 스칼라 기준) - 상위 반을 반환하는 벡터 포화 배수화 곱하기 (벡터 또는 스칼라 기준)

NEON 요소 및 구조체 로드/저장 명령어

인터리브

요소 및 구조체 로드와 저장 명령어의 정렬에 대한 제한

VLDn 및 VSTn (단일 n-요소 구조체를 하나의 레인에 로드) - 대부분의 데이터 액세스에 사용됩니다. 일반 벡터가 로드될 수 있습니다 (n = 1)

VLDn (단일 n-요소 구조체를 모든 레인에 로드)

VLDn 및 VSTn (여러 n-요소 구조체)

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204ik/CIHJCAAG.html]

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489i/CJABFHEJ.html]

아따.. 타입 여러가지네..

uint64x1_t vadd_u64 (uint64x1_t, uint64x1_t)

uint32x2_t vadd_u32 (uint32x2_t, uint32x2_t) - Form of expected instruction(s): vadd.i32 d0, d0, d0

uint16x4_t vadd_u16 (uint16x4_t, uint16x4_t) - Form of expected instruction(s): vadd.i16 d0, d0, d0

uint8x8_t vadd_u8 (uint8x8_t, uint8x8_t) - Form of expected instruction(s): vadd.i8 d0, d0, d0

int64x1_t vadd_s64 (int64x1_t, int64x1_t)

int32x2_t vadd_s32 (int32x2_t, int32x2_t) - Form of expected instruction(s): vadd.i32 d0, d0, d0

int16x4_t vadd_s16 (int16x4_t, int16x4_t) - Form of expected instruction(s): vadd.i16 d0, d0, d0

int8x8_t vadd_s8 (int8x8_t, int8x8_t) - Form of expected instruction(s): vadd.i8 d0, d0, d0

float32x2_t vadd_f32 (float32x2_t, float32x2_t) - Form of expected instruction(s): vadd.f32 d0, d0, d0

[링크 : https://gcc.gnu.org/onlinedocs/gcc-4.6.1/gcc/ARM-NEON-Intrinsics.html]

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Posted by 구차니

neon 예제 실행 + 커널 교체

일단 raspbian

pi@raspberrypi ~/src $ ./neon

Sum was 4950

머지.. 별거 없네? -_-?

---

커널에서 Neon 지원을 끄고 했는데도 되네 잉?

$ cat /proc/cpuinfo

processor : 0

model name : ARMv7 Processor rev 5 (v7l)

BogoMIPS : 38.40

Features : half thumb fastmult vfp edsp vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm

CPU implementer : 0x41

CPU architecture: 7

CPU variant : 0x0

CPU part : 0xc07

CPU revision : 5

$ LD_SHOW_AUXV=1 ls

AT_HWCAP: half thumb fastmult vfp edsp vfpv3

AT_PAGESZ: 4096

AT_CLKTCK: 100

AT_PHDR: 0x8034

AT_PHENT: 32

AT_PHNUM: 9

AT_BASE: 0x76f14000

AT_FLAGS: 0x0

AT_ENTRY: 0xc3f0

AT_UID: 1000

AT_EUID: 1000

AT_GID: 1000

AT_EGID: 1000

AT_SECURE: 0

AT_RANDOM: 0x7e93292c

AT_??? (0x1a): 0x0

AT_EXECFN: /bin/ls

AT_PLATFORM: v7l

$ ./neon

Sum was 4950

'Programming > neon' 카테고리의 다른 글

neon auto vectoring (0)	2015.05.06
kernel mode neon support? (0)	2015.05.06
NEON instruction (0)	2015.05.05
arm neon 예제 컴파일 (0)	2015.05.03
NEON Intrinsics (0)	2015.04.30

Posted by 구차니

arm neon 예제 컴파일

gcc로 컴파일 하니 그런 파일 못 찾겠다고 배째서 일단 라즈베리파이용 컴파일러로 찾아보니

일단은 존재한다!

$ find ./rasp/tools/ -iname "arm_neon.h"

./rasp/tools/arm-bcm2708/arm-bcm2708hardfp-linux-gnueabi/lib/gcc/arm-bcm2708hardfp-linux-gnueabi/4.7.1/include/arm_neon.h

./rasp/tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian-x64/lib/gcc/arm-linux-gnueabihf/4.8.3/include/arm_neon.h

./rasp/tools/arm-bcm2708/arm-bcm2708-linux-gnueabi/lib/gcc/arm-bcm2708-linux-gnueabi/4.7.1/include/arm_neon.h

./rasp/tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian/lib/gcc/arm-linux-gnueabihf/4.8.3/include/arm_neon.h

/* neon_example.c - Neon intrinsics example program */

#include <stdint.h>

#include <stdio.h>

#include <assert.h>

#include <arm_neon.h>

/* fill array with increasing integers beginning with 0 */

void fill_array(int16_t *array, int size)

{ int i;

for (i = 0; i < size; i++)

{

array[i] = i;

}

/* return the sum of all elements in an array. This works by calculating 4 totals (one for each lane) and adding those at the end to get the final total */

int sum_array(int16_t *array, int size)

{

/* initialize the accumulator vector to zero */

int16x4_t acc = vdup_n_s16(0);

int32x2_t acc1;

int64x1_t acc2;

/* this implementation assumes the size of the array is a multiple of 4 */

assert((size % 4) == 0);

/* counting backwards gives better code */

for (; size != 0; size -= 4)

{

int16x4_t vec;

/* load 4 values in parallel from the array */

vec = vld1_s16(array);

/* increment the array pointer to the next element */

array += 4;

/* add the vector to the accumulator vector */

acc = vadd_s16(acc, vec);

}

/* calculate the total */

acc1 = vpaddl_s16(acc);

acc2 = vpaddl_s32(acc1);

/* return the total as an integer */

return (int)vget_lane_s64(acc2, 0);

}

/* main function */

int main()

{

int16_t my_array[100];

fill_array(my_array, 100);

printf("Sum was %d\n", sum_array(my_array, 100));

return 0;

}

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0205j/BABGHIFH.html]

일단 옵션없이 해보니..

$ arm-linux-gnueabihf-gcc neon.c

In file included from neon.c:4:0:

/home/minimonk/rasp/tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian/lib/gcc/arm-linux-gnueabihf/4.8.3/include/arm_neon.h:32:2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h

#error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h

^

neon.c: In function ‘sum_array’:

neon.c:17:6: error: unknown type name ‘int16x4_t’

int16x4_t acc = vdup_n_s16(0);

^

neon.c:18:6: error: unknown type name ‘int32x2_t’

int32x2_t acc1;

^

neon.c:19:6: error: unknown type name ‘int64x1_t’

int64x1_t acc2;

^

neon.c:25:11: error: unknown type name ‘int16x4_t’

int16x4_t vec;

^

옵션을 하나하나 추가해보는데 끄응.. 안되네 -_-?

$ arm-linux-gnueabihf-gcc -mfloat-abi=softfp -mfpu=neon neon.c

/home/minimonk/rasp/tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian/bin/../lib/gcc/arm-linux-gnueabihf/4.8.3/../../../../arm-linux-gnueabihf/bin/ld: error: a.out uses VFP register arguments, /tmp/ccO9iWfd.o does not

/home/minimonk/rasp/tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian/bin/../lib/gcc/arm-linux-gnueabihf/4.8.3/../../../../arm-linux-gnueabihf/bin/ld: failed to merge target specific data of file /tmp/ccO9iWfd.o

collect2: error: ld returned 1 exit status

혹시나 해서 아키텍쳐를 넣어줘도...

$ arm-linux-gnueabihf-gcc -march=armv7-a -mfloat-abi=softfp -mfpu=neon neon.c

/home/minimonk/rasp/tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian/bin/../lib/gcc/arm-linux-gnueabihf/4.8.3/../../../../arm-linux-gnueabihf/bin/ld: error: a.out uses VFP register arguments, /tmp/ccNuGigl.o does not

/home/minimonk/rasp/tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian/bin/../lib/gcc/arm-linux-gnueabihf/4.8.3/../../../../arm-linux-gnueabihf/bin/ld: failed to merge target specific data of file /tmp/ccNuGigl.o

collect2: error: ld returned 1 exit status

안되서 multi-lib 지원하나 보지만.. 안되는거 같고..

$ arm-linux-gnueabihf-gcc -print-multi-lib

.;

혹시나 해서.. softfp 대신 hard로 하니 되네?! 머지 -ㅁ-?

$ arm-linux-gnueabihf-gcc -mcpu=cortex-a8 -mfloat-abi=hard -mfpu=neon neon.c

가능한 옵션은 soft / softfp / hard 인데 음.. neon 쓰려면 무조건 이걸로 해야 하려나?

-mfloat-abi=name

Specifies which floating-point ABI to use. Permissible values are: ‘soft’, ‘softfp’ and ‘hard’.

Specifying ‘soft’ causes GCC to generate output containing library calls for floating-point operations. ‘softfp’ allows the generation of code using hardware floating-point instructions, but still uses the soft-float calling conventions. ‘hard’ allows generation of floating-point instructions and uses FPU-specific calling conventions.

The default depends on the specific target configuration. Note that the hard-float and soft-float ABIs are not link-compatible; you must compile your entire program with the same ABI, and link with a compatible set of libraries.

[링크 : https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html]

컴파일 결과를 보니 음.. 맞는건가?

$ file a.out

a.out: ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV), dynamically linked (uses shared libs), for GNU/Linux 2.6.26, BuildID[sha1]=aec5075259deee1c6e49409e9ea6ecd5f8857d4a, not stripped

좀 더 자세히 볼까나

$ readelf -a a.out

ELF Header:

Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00

Class: ELF32

Data: 2's complement, little endian

Version: 1 (current)

OS/ABI: UNIX - System V

ABI Version: 0

Type: EXEC (Executable file)

Machine: ARM

Version: 0x1

Entry point address: 0x832c

Start of program headers: 52 (bytes into file)

Start of section headers: 2416 (bytes into file)

Flags: 0x5000402, has entry point, Version5 EABI, hard-float ABI

Size of this header: 52 (bytes)

Size of program headers: 32 (bytes)

Number of program headers: 8

Size of section headers: 40 (bytes)

Number of section headers: 30

Section header string table index: 27

Section Headers:

[Nr] Name Type Addr Off Size ES Flg Lk Inf Al

[ 0] NULL 00000000 000000 000000 00 0 0 0

[ 1] .interp PROGBITS 00008134 000134 000019 00 A 0 0 1

[ 2] .note.ABI-tag NOTE 00008150 000150 000020 00 A 0 0 4

[ 3] .note.gnu.build-i NOTE 00008170 000170 000024 00 A 0 0 4

[ 4] .hash HASH 00008194 000194 00002c 04 A 5 0 4

[ 5] .dynsym DYNSYM 000081c0 0001c0 000060 10 A 6 1 4

[ 6] .dynstr STRTAB 00008220 000220 000051 00 A 0 0 1

[ 7] .gnu.version VERSYM 00008272 000272 00000c 02 A 5 0 2

[ 8] .gnu.version_r VERNEED 00008280 000280 000020 00 A 6 1 4

[ 9] .rel.dyn REL 000082a0 0002a0 000008 08 A 5 0 4

[10] .rel.plt REL 000082a8 0002a8 000028 08 A 5 12 4

[11] .init PROGBITS 000082d0 0002d0 00000c 00 AX 0 0 4

[12] .plt PROGBITS 000082dc 0002dc 000050 04 AX 0 0 4

[13] .text PROGBITS 0000832c 00032c 000338 00 AX 0 0 4

[14] .fini PROGBITS 00008664 000664 000008 00 AX 0 0 4

[15] .rodata PROGBITS 0000866c 00066c 000034 00 A 0 0 4

[16] .ARM.exidx ARM_EXIDX 000086a0 0006a0 000008 00 AL 13 0 4

[17] .eh_frame PROGBITS 000086a8 0006a8 000004 00 A 0 0 4

[18] .init_array INIT_ARRAY 000106ac 0006ac 000004 00 WA 0 0 4

[19] .fini_array FINI_ARRAY 000106b0 0006b0 000004 00 WA 0 0 4

[20] .jcr PROGBITS 000106b4 0006b4 000004 00 WA 0 0 4

[21] .dynamic DYNAMIC 000106b8 0006b8 0000e8 08 WA 6 0 4

[22] .got PROGBITS 000107a0 0007a0 000024 04 WA 0 0 4

[23] .data PROGBITS 000107c4 0007c4 000008 00 WA 0 0 4

[24] .bss NOBITS 000107cc 0007cc 000004 00 WA 0 0 1

[25] .comment PROGBITS 00000000 0007cc 00005f 01 MS 0 0 1

[26] .ARM.attributes ARM_ATTRIBUTES 00000000 00082b 00003f 00 0 0 1

[27] .shstrtab STRTAB 00000000 00086a 000106 00 0 0 1

[28] .symtab SYMTAB 00000000 000e20 000710 10 29 85 4

[29] .strtab STRTAB 00000000 001530 00048f 00 0 0 1

Key to Flags:

W (write), A (alloc), X (execute), M (merge), S (strings)

I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)

O (extra OS processing required) o (OS specific), p (processor specific)

There are no section groups in this file.

Program Headers:

Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align

EXIDX 0x0006a0 0x000086a0 0x000086a0 0x00008 0x00008 R 0x4

PHDR 0x000034 0x00008034 0x00008034 0x00100 0x00100 R E 0x4

INTERP 0x000134 0x00008134 0x00008134 0x00019 0x00019 R 0x1

[Requesting program interpreter: /lib/ld-linux-armhf.so.3]

LOAD 0x000000 0x00008000 0x00008000 0x006ac 0x006ac R E 0x8000

LOAD 0x0006ac 0x000106ac 0x000106ac 0x00120 0x00124 RW 0x8000

DYNAMIC 0x0006b8 0x000106b8 0x000106b8 0x000e8 0x000e8 RW 0x4

NOTE 0x000150 0x00008150 0x00008150 0x00044 0x00044 R 0x4

GNU_STACK 0x000000 0x00000000 0x00000000 0x00000 0x00000 RW 0x10

Section to Segment mapping:

Segment Sections...

00 .ARM.exidx

01

02 .interp

03 .interp .note.ABI-tag .note.gnu.build-id .hash .dynsym .dynstr .gnu.version .gnu.version_r .rel.dyn .rel.plt .init .plt .text .fini .rodata .ARM.exidx .eh_frame

04 .init_array .fini_array .jcr .dynamic .got .data .bss

05 .dynamic

06 .note.ABI-tag .note.gnu.build-id

07

Dynamic section at offset 0x6b8 contains 24 entries:

Tag Type Name/Value

0x00000001 (NEEDED) Shared library: [libc.so.6]

0x0000000c (INIT) 0x82d0

0x0000000d (FINI) 0x8664

0x00000019 (INIT_ARRAY) 0x106ac

0x0000001b (INIT_ARRAYSZ) 4 (bytes)

0x0000001a (FINI_ARRAY) 0x106b0

0x0000001c (FINI_ARRAYSZ) 4 (bytes)

0x00000004 (HASH) 0x8194

0x00000005 (STRTAB) 0x8220

0x00000006 (SYMTAB) 0x81c0

0x0000000a (STRSZ) 81 (bytes)

0x0000000b (SYMENT) 16 (bytes)

0x00000015 (DEBUG) 0x0

0x00000003 (PLTGOT) 0x107a0

0x00000002 (PLTRELSZ) 40 (bytes)

0x00000014 (PLTREL) REL

0x00000017 (JMPREL) 0x82a8

0x00000011 (REL) 0x82a0

0x00000012 (RELSZ) 8 (bytes)

0x00000013 (RELENT) 8 (bytes)

0x6ffffffe (VERNEED) 0x8280

0x6fffffff (VERNEEDNUM) 1

0x6ffffff0 (VERSYM) 0x8272

0x00000000 (NULL) 0x0

Relocation section '.rel.dyn' at offset 0x2a0 contains 1 entries:

Offset Info Type Sym.Value Sym. Name

000107c0 00000315 R_ARM_GLOB_DAT 00000000 __gmon_start__

Relocation section '.rel.plt' at offset 0x2a8 contains 5 entries:

Offset Info Type Sym.Value Sym. Name

000107ac 00000116 R_ARM_JUMP_SLOT 000082f0 printf

000107b0 00000216 R_ARM_JUMP_SLOT 000082fc __libc_start_main

000107b4 00000316 R_ARM_JUMP_SLOT 00000000 __gmon_start__

000107b8 00000416 R_ARM_JUMP_SLOT 00008314 abort

000107bc 00000516 R_ARM_JUMP_SLOT 00008320 __assert_fail

Unwind table index '.ARM.exidx' at offset 0x6a0 contains 1 entries:

0x832c <_start>: 0x1 [cantunwind]

Symbol table '.dynsym' contains 6 entries:

Num: Value Size Type Bind Vis Ndx Name

0: 00000000 0 NOTYPE LOCAL DEFAULT UND

1: 000082f0 0 FUNC GLOBAL DEFAULT UND printf@GLIBC_2.4 (2)

2: 000082fc 0 FUNC GLOBAL DEFAULT UND __libc_start_main@GLIBC_2.4 (2)

3: 00000000 0 NOTYPE WEAK DEFAULT UND __gmon_start__

4: 00008314 0 FUNC GLOBAL DEFAULT UND abort@GLIBC_2.4 (2)

5: 00008320 0 FUNC GLOBAL DEFAULT UND __assert_fail@GLIBC_2.4 (2)

Symbol table '.symtab' contains 113 entries:

Num: Value Size Type Bind Vis Ndx Name

0: 00000000 0 NOTYPE LOCAL DEFAULT UND

1: 00008134 0 SECTION LOCAL DEFAULT 1

2: 00008150 0 SECTION LOCAL DEFAULT 2

3: 00008170 0 SECTION LOCAL DEFAULT 3

4: 00008194 0 SECTION LOCAL DEFAULT 4

5: 000081c0 0 SECTION LOCAL DEFAULT 5

6: 00008220 0 SECTION LOCAL DEFAULT 6

7: 00008272 0 SECTION LOCAL DEFAULT 7

8: 00008280 0 SECTION LOCAL DEFAULT 8

9: 000082a0 0 SECTION LOCAL DEFAULT 9

10: 000082a8 0 SECTION LOCAL DEFAULT 10

11: 000082d0 0 SECTION LOCAL DEFAULT 11

12: 000082dc 0 SECTION LOCAL DEFAULT 12

13: 0000832c 0 SECTION LOCAL DEFAULT 13

14: 00008664 0 SECTION LOCAL DEFAULT 14

15: 0000866c 0 SECTION LOCAL DEFAULT 15

16: 000086a0 0 SECTION LOCAL DEFAULT 16

17: 000086a8 0 SECTION LOCAL DEFAULT 17

18: 000106ac 0 SECTION LOCAL DEFAULT 18

19: 000106b0 0 SECTION LOCAL DEFAULT 19

20: 000106b4 0 SECTION LOCAL DEFAULT 20

21: 000106b8 0 SECTION LOCAL DEFAULT 21

22: 000107a0 0 SECTION LOCAL DEFAULT 22

23: 000107c4 0 SECTION LOCAL DEFAULT 23

24: 000107cc 0 SECTION LOCAL DEFAULT 24

25: 00000000 0 SECTION LOCAL DEFAULT 25

26: 00000000 0 SECTION LOCAL DEFAULT 26

27: 00000000 0 FILE LOCAL DEFAULT ABS /home/minimonk/rasp/tools

28: 00008150 0 NOTYPE LOCAL DEFAULT 2 $d

29: 0000832c 0 NOTYPE LOCAL DEFAULT 13 $a

30: 000086a0 0 NOTYPE LOCAL DEFAULT 16 $d

31: 0000835c 0 NOTYPE LOCAL DEFAULT 13 $d

32: 0000866c 0 NOTYPE LOCAL DEFAULT 15 $d

33: 000107c4 0 NOTYPE LOCAL DEFAULT 23 $d

34: 00000000 0 FILE LOCAL DEFAULT ABS /home/minimonk/rasp/tools

35: 00008368 0 NOTYPE LOCAL DEFAULT 13 $a

36: 00008368 0 FUNC LOCAL DEFAULT 13 call_gmon_start

37: 00008384 0 NOTYPE LOCAL DEFAULT 13 $d

38: 000082d0 0 NOTYPE LOCAL DEFAULT 11 $a

39: 00008664 0 NOTYPE LOCAL DEFAULT 14 $a

40: 00000000 0 FILE LOCAL DEFAULT ABS /home/minimonk/rasp/tools

41: 000082d8 0 NOTYPE LOCAL DEFAULT 11 $a

42: 00008668 0 NOTYPE LOCAL DEFAULT 14 $a

43: 00000000 0 FILE LOCAL DEFAULT ABS crtstuff.c

44: 000106b4 0 OBJECT LOCAL DEFAULT 20 __JCR_LIST__

45: 0000838c 0 NOTYPE LOCAL DEFAULT 13 $a

46: 0000838c 0 FUNC LOCAL DEFAULT 13 deregister_tm_clones

47: 000083b0 0 NOTYPE LOCAL DEFAULT 13 $d

48: 000083bc 0 NOTYPE LOCAL DEFAULT 13 $a

49: 000083bc 0 FUNC LOCAL DEFAULT 13 register_tm_clones

50: 000083e8 0 NOTYPE LOCAL DEFAULT 13 $d

51: 000107c8 0 NOTYPE LOCAL DEFAULT 23 $d

52: 000083f4 0 NOTYPE LOCAL DEFAULT 13 $a

53: 000083f4 0 FUNC LOCAL DEFAULT 13 __do_global_dtors_aux

54: 00008418 0 NOTYPE LOCAL DEFAULT 13 $d

55: 000107cc 1 OBJECT LOCAL DEFAULT 24 completed.8811

56: 000106b0 0 NOTYPE LOCAL DEFAULT 19 $d

57: 000106b0 0 OBJECT LOCAL DEFAULT 19 __do_global_dtors_aux_fin

58: 0000841c 0 NOTYPE LOCAL DEFAULT 13 $a

59: 0000841c 0 FUNC LOCAL DEFAULT 13 frame_dummy

60: 00008448 0 NOTYPE LOCAL DEFAULT 13 $d

61: 000106ac 0 NOTYPE LOCAL DEFAULT 18 $d

62: 000106ac 0 OBJECT LOCAL DEFAULT 18 __frame_dummy_init_array_

63: 000107cc 0 NOTYPE LOCAL DEFAULT 24 $d

64: 00000000 0 FILE LOCAL DEFAULT ABS neon.c

65: 00008450 0 NOTYPE LOCAL DEFAULT 13 $a

66: 00008670 0 NOTYPE LOCAL DEFAULT 15 $d

67: 00008694 10 OBJECT LOCAL DEFAULT 15 __PRETTY_FUNCTION__.14503

68: 00000000 0 FILE LOCAL DEFAULT ABS elf-init.oS

69: 00008600 0 NOTYPE LOCAL DEFAULT 13 $a

70: 00008658 0 NOTYPE LOCAL DEFAULT 13 $d

71: 00008660 0 NOTYPE LOCAL DEFAULT 13 $a

72: 00000000 0 FILE LOCAL DEFAULT ABS crtstuff.c

73: 000086a8 0 NOTYPE LOCAL DEFAULT 17 $d

74: 000086a8 0 OBJECT LOCAL DEFAULT 17 __FRAME_END__

75: 000106b4 0 NOTYPE LOCAL DEFAULT 20 $d

76: 000106b4 0 OBJECT LOCAL DEFAULT 20 __JCR_END__

77: 00000000 0 FILE LOCAL DEFAULT ABS

78: 000106b0 0 NOTYPE LOCAL DEFAULT 18 __init_array_end

79: 000106b8 0 OBJECT LOCAL DEFAULT 21 _DYNAMIC

80: 000106ac 0 NOTYPE LOCAL DEFAULT 18 __init_array_start

81: 000107a0 0 OBJECT LOCAL DEFAULT 22 _GLOBAL_OFFSET_TABLE_

82: 000082dc 0 NOTYPE LOCAL DEFAULT 12 $a

83: 000082ec 0 NOTYPE LOCAL DEFAULT 12 $d

84: 000082f0 0 NOTYPE LOCAL DEFAULT 12 $a

85: 00008660 4 FUNC GLOBAL DEFAULT 13 __libc_csu_fini

86: 00000000 0 NOTYPE WEAK DEFAULT UND _ITM_deregisterTMCloneTab

87: 000107c4 0 NOTYPE WEAK DEFAULT 23 data_start

88: 000082f0 0 FUNC GLOBAL DEFAULT UND printf@@GLIBC_2.4

89: 000107cc 0 NOTYPE GLOBAL DEFAULT 24 __bss_start__

90: 000084b4 252 FUNC GLOBAL DEFAULT 13 sum_array

91: 000107d0 0 NOTYPE GLOBAL DEFAULT 24 _bss_end__

92: 000107cc 0 NOTYPE GLOBAL DEFAULT 23 _edata

93: 00008664 0 FUNC GLOBAL DEFAULT 14 _fini

94: 000107d0 0 NOTYPE GLOBAL DEFAULT 24 __bss_end__

95: 000107c4 0 NOTYPE GLOBAL DEFAULT 23 __data_start

96: 000082fc 0 FUNC GLOBAL DEFAULT UND __libc_start_main@@GLIBC_

97: 00000000 0 NOTYPE WEAK DEFAULT UND __gmon_start__

98: 000107c8 0 OBJECT GLOBAL HIDDEN 23 __dso_handle

99: 0000866c 4 OBJECT GLOBAL DEFAULT 15 _IO_stdin_used

100: 00008600 96 FUNC GLOBAL DEFAULT 13 __libc_csu_init

101: 00008450 100 FUNC GLOBAL DEFAULT 13 fill_array

102: 000107d0 0 NOTYPE GLOBAL DEFAULT 24 _end

103: 0000832c 0 FUNC GLOBAL DEFAULT 13 _start

104: 000107d0 0 NOTYPE GLOBAL DEFAULT 24 __end__

105: 000107cc 0 NOTYPE GLOBAL DEFAULT 24 __bss_start

106: 000085b0 80 FUNC GLOBAL DEFAULT 13 main

107: 00000000 0 NOTYPE WEAK DEFAULT UND _Jv_RegisterClasses

108: 000107cc 0 OBJECT GLOBAL HIDDEN 23 __TMC_END__

109: 00000000 0 NOTYPE WEAK DEFAULT UND _ITM_registerTMCloneTable

110: 00008314 0 FUNC GLOBAL DEFAULT UND abort@@GLIBC_2.4

111: 000082d0 0 FUNC GLOBAL DEFAULT 11 _init

112: 00008320 0 FUNC GLOBAL DEFAULT UND __assert_fail@@GLIBC_2.4

Histogram for bucket list length (total of 3 buckets):

Length Number % of total Coverage

0 0 ( 0.0%)

1 1 ( 33.3%) 20.0%

2 2 ( 66.7%) 100.0%

Version symbols section '.gnu.version' contains 6 entries:

Addr: 0000000000008272 Offset: 0x000272 Link: 5 (.dynsym)

000: 0 (*local*) 2 (GLIBC_2.4) 2 (GLIBC_2.4) 0 (*local*)

004: 2 (GLIBC_2.4) 2 (GLIBC_2.4)

Version needs section '.gnu.version_r' contains 1 entries:

Addr: 0x0000000000008280 Offset: 0x000280 Link: 6 (.dynstr)

000000: Version: 1 File: libc.so.6 Cnt: 1

0x0010: Name: GLIBC_2.4 Flags: none Version: 2

Displaying notes found at file offset 0x00000150 with length 0x00000020:

Owner Data size Description

GNU 0x00000010 NT_GNU_ABI_TAG (ABI version tag)

OS: Linux, ABI: 2.6.26

Displaying notes found at file offset 0x00000170 with length 0x00000024:

Owner Data size Description

GNU 0x00000014 NT_GNU_BUILD_ID (unique build ID bitstring)

Build ID: aec5075259deee1c6e49409e9ea6ecd5f8857d4a

Attribute Section: aeabi

File Attributes

Tag_CPU_name: "Cortex-A8"

Tag_CPU_arch: v7

Tag_CPU_arch_profile: Application

Tag_ARM_ISA_use: Yes

Tag_THUMB_ISA_use: Thumb-2

Tag_FP_arch: VFPv3

Tag_Advanced_SIMD_arch: NEONv1

Tag_ABI_PCS_wchar_t: 4

Tag_ABI_FP_denormal: Needed

Tag_ABI_FP_exceptions: Needed

Tag_ABI_FP_number_model: IEEE 754

Tag_ABI_align_needed: 8-byte

Tag_ABI_align_preserved: 8-byte, except leaf SP

Tag_ABI_enum_size: int

Tag_ABI_HardFP_use: SP and DP

Tag_ABI_VFP_args: VFP registers

Tag_CPU_unaligned_access: v6

Tag_DIV_use: Not allowed

Tag_Virtualization_use: TrustZone

+

hello world 출력하게 해서 옵션 장난

$ arm-linux-gnueabihf-gcc -mcpu=cortex-a8 -mfloat-abi=hard -mfpu=neon hello.c

$ arm-linux-gnueabihf-gcc -o b.out hello.c

차이가 없네 -_-

+

2015.05.06 추가

$ arm-linux-gnueabihf-objdump -D neon

neon: file format elf32-littlearm

Disassembly of section .interp:

00008134 <.interp>:

8134: 62696c2f rsbvs r6, r9, #12032 ; 0x2f00

8138: 2d646c2f stclcs 12, cr6, [r4, #-188]! ; 0xffffff44

813c: 756e696c strbvc r6, [lr, #-2412]! ; 0x96c

8140: 72612d78 rsbvc r2, r1, #120, 26 ; 0x1e00

8144: 2e66686d cdpcs 8, 6, cr6, cr6, cr13, {3}

8148: 332e6f73 teqcc lr, #460 ; 0x1cc

...

Disassembly of section .note.ABI-tag:

00008150 <.note.ABI-tag>:

8150: 00000004 andeq r0, r0, r4

8154: 00000010 andeq r0, r0, r0, lsl r0

8158: 00000001 andeq r0, r0, r1

815c: 00554e47 subseq r4, r5, r7, asr #28

8160: 00000000 andeq r0, r0, r0

8164: 00000002 andeq r0, r0, r2

8168: 00000006 andeq r0, r0, r6

816c: 0000001a andeq r0, r0, sl, lsl r0

Disassembly of section .note.gnu.build-id:

00008170 <.note.gnu.build-id>:

8170: 00000004 andeq r0, r0, r4

8174: 00000014 andeq r0, r0, r4, lsl r0

8178: 00000003 andeq r0, r0, r3

817c: 00554e47 subseq r4, r5, r7, asr #28

8180: 5207c5ae andpl ip, r7, #729808896 ; 0x2b800000

8184: 1ceede59 stclne 14, cr13, [lr], #356 ; 0x164

8188: 9e40496e cdpls 9, 4, cr4, cr0, cr14, {3}

818c: d5eca69e strble sl, [ip, #1694]! ; 0x69e

8190: 4a7d85f8 bmi 1f69978 <__bss_end__+0x1f591a8>

Disassembly of section .hash:

00008194 <.hash>:

8194: 00000003 andeq r0, r0, r3

8198: 00000006 andeq r0, r0, r6

819c: 00000005 andeq r0, r0, r5

81a0: 00000002 andeq r0, r0, r2

81a4: 00000004 andeq r0, r0, r4

...

81b8: 00000001 andeq r0, r0, r1

81bc: 00000003 andeq r0, r0, r3

Disassembly of section .dynsym:

000081c0 <.dynsym>:

...

81d0: 0000001f andeq r0, r0, pc, lsl r0

81d4: 000082f0 strdeq r8, [r0], -r0

81d8: 00000000 andeq r0, r0, r0

81dc: 00000012 andeq r0, r0, r2, lsl r0

81e0: 00000026 andeq r0, r0, r6, lsr #32

81e4: 000082fc strdeq r8, [r0], -ip

81e8: 00000000 andeq r0, r0, r0

81ec: 00000012 andeq r0, r0, r2, lsl r0

81f0: 00000038 andeq r0, r0, r8, lsr r0

...

81fc: 00000020 andeq r0, r0, r0, lsr #32

8200: 0000000b andeq r0, r0, fp

8204: 00008314 andeq r8, r0, r4, lsl r3

8208: 00000000 andeq r0, r0, r0

820c: 00000012 andeq r0, r0, r2, lsl r0

8210: 00000011 andeq r0, r0, r1, lsl r0

8214: 00008320 andeq r8, r0, r0, lsr #6

8218: 00000000 andeq r0, r0, r0

821c: 00000012 andeq r0, r0, r2, lsl r0

Disassembly of section .dynstr:

00008220 <.dynstr>:

8220: 62696c00 rsbvs r6, r9, #0, 24

8224: 6f732e63 svcvs 0x00732e63

8228: 6100362e tstvs r0, lr, lsr #12

822c: 74726f62 ldrbtvc r6, [r2], #-3938 ; 0xf62

8230: 615f5f00 cmpvs pc, r0, lsl #30

8234: 72657373 rsbvc r7, r5, #-872415231 ; 0xcc000001

8238: 61665f74 smcvs 26100 ; 0x65f4

823c: 70006c69 andvc r6, r0, r9, ror #24

8240: 746e6972 strbtvc r6, [lr], #-2418 ; 0x972

8244: 5f5f0066 svcpl 0x005f0066

8248: 6362696c cmnvs r2, #108, 18 ; 0x1b0000

824c: 6174735f cmnvs r4, pc, asr r3

8250: 6d5f7472 cfldrdvs mvd7, [pc, #-456] ; 8090 <_init-0x240>

8254: 006e6961 rsbeq r6, lr, r1, ror #18

8258: 6d675f5f stclvs 15, cr5, [r7, #-380]! ; 0xfffffe84

825c: 735f6e6f cmpvc pc, #1776 ; 0x6f0

8260: 74726174 ldrbtvc r6, [r2], #-372 ; 0x174

8264: 47005f5f smlsdmi r0, pc, pc, r5 ; <UNPREDICTABLE>

8268: 4342494c movtmi r4, #10572 ; 0x294c

826c: 342e325f strtcc r3, [lr], #-607 ; 0x25f

...

Disassembly of section .gnu.version:

00008272 <.gnu.version>:

8272: 00020000 andeq r0, r2, r0

8276: 00000002 andeq r0, r0, r2

827a: 00020002 andeq r0, r2, r2

Disassembly of section .gnu.version_r:

00008280 <.gnu.version_r>:

8280: 00010001 andeq r0, r1, r1

8284: 00000001 andeq r0, r0, r1

8288: 00000010 andeq r0, r0, r0, lsl r0

828c: 00000000 andeq r0, r0, r0

8290: 0d696914 stcleq 9, cr6, [r9, #-80]! ; 0xffffffb0

8294: 00020000 andeq r0, r2, r0

8298: 00000047 andeq r0, r0, r7, asr #32

829c: 00000000 andeq r0, r0, r0

Disassembly of section .rel.dyn:

000082a0 <.rel.dyn>:

82a0: 000107c0 andeq r0, r1, r0, asr #15

82a4: 00000315 andeq r0, r0, r5, lsl r3

Disassembly of section .rel.plt:

000082a8 <.rel.plt>:

82a8: 000107ac andeq r0, r1, ip, lsr #15

82ac: 00000116 andeq r0, r0, r6, lsl r1

82b0: 000107b0 ; <UNDEFINED> instruction: 0x000107b0

82b4: 00000216 andeq r0, r0, r6, lsl r2

82b8: 000107b4 ; <UNDEFINED> instruction: 0x000107b4

82bc: 00000316 andeq r0, r0, r6, lsl r3

82c0: 000107b8 ; <UNDEFINED> instruction: 0x000107b8

82c4: 00000416 andeq r0, r0, r6, lsl r4

82c8: 000107bc ; <UNDEFINED> instruction: 0x000107bc

82cc: 00000516 andeq r0, r0, r6, lsl r5

Disassembly of section .init:

000082d0 <_init>:

82d0: e92d4008 push {r3, lr}

82d4: eb000023 bl 8368 <call_gmon_start>

82d8: e8bd8008 pop {r3, pc}

Disassembly of section .plt:

000082dc <.plt>:

82dc: e52de004 push {lr} ; (str lr, [sp, #-4]!)

82e0: e59fe004 ldr lr, [pc, #4] ; 82ec <_init+0x1c>

82e4: e08fe00e add lr, pc, lr

82e8: e5bef008 ldr pc, [lr, #8]!

82ec: 000084b4 ; <UNDEFINED> instruction: 0x000084b4

82f0: e28fc600 add ip, pc, #0, 12

82f4: e28cca08 add ip, ip, #8, 20 ; 0x8000

82f8: e5bcf4b4 ldr pc, [ip, #1204]! ; 0x4b4

82fc: e28fc600 add ip, pc, #0, 12

8300: e28cca08 add ip, ip, #8, 20 ; 0x8000

8304: e5bcf4ac ldr pc, [ip, #1196]! ; 0x4ac

8308: e28fc600 add ip, pc, #0, 12

830c: e28cca08 add ip, ip, #8, 20 ; 0x8000

8310: e5bcf4a4 ldr pc, [ip, #1188]! ; 0x4a4

8314: e28fc600 add ip, pc, #0, 12

8318: e28cca08 add ip, ip, #8, 20 ; 0x8000

831c: e5bcf49c ldr pc, [ip, #1180]! ; 0x49c

8320: e28fc600 add ip, pc, #0, 12

8324: e28cca08 add ip, ip, #8, 20 ; 0x8000

8328: e5bcf494 ldr pc, [ip, #1172]! ; 0x494

Disassembly of section .text:

0000832c <_start>:

832c: e3a0b000 mov fp, #0

8330: e3a0e000 mov lr, #0

8334: e49d1004 pop {r1} ; (ldr r1, [sp], #4)

8338: e1a0200d mov r2, sp

833c: e52d2004 push {r2} ; (str r2, [sp, #-4]!)

8340: e52d0004 push {r0} ; (str r0, [sp, #-4]!)

8344: e59fc010 ldr ip, [pc, #16] ; 835c <_start+0x30>

8348: e52dc004 push {ip} ; (str ip, [sp, #-4]!)

834c: e59f000c ldr r0, [pc, #12] ; 8360 <_start+0x34>

8350: e59f300c ldr r3, [pc, #12] ; 8364 <_start+0x38>

8354: ebffffe8 bl 82fc <_init+0x2c>

8358: ebffffed bl 8314 <_init+0x44>

835c: 00008660 andeq r8, r0, r0, ror #12

8360: 000085b0 ; <UNDEFINED> instruction: 0x000085b0

8364: 00008600 andeq r8, r0, r0, lsl #12

00008368 <call_gmon_start>:

8368: e59f3014 ldr r3, [pc, #20] ; 8384 <call_gmon_start+0x1c>

836c: e59f2014 ldr r2, [pc, #20] ; 8388 <call_gmon_start+0x20>

8370: e08f3003 add r3, pc, r3

8374: e7933002 ldr r3, [r3, r2]

8378: e3530000 cmp r3, #0

837c: 012fff1e bxeq lr

8380: eaffffe0 b 8308 <_init+0x38>

8384: 00008428 andeq r8, r0, r8, lsr #8

8388: 00000020 andeq r0, r0, r0, lsr #32

0000838c <deregister_tm_clones>:

838c: e59f301c ldr r3, [pc, #28] ; 83b0 <deregister_tm_clones+0x24>

8390: e59f001c ldr r0, [pc, #28] ; 83b4 <deregister_tm_clones+0x28>

8394: e0603003 rsb r3, r0, r3

8398: e3530006 cmp r3, #6

839c: 912fff1e bxls lr

83a0: e59f3010 ldr r3, [pc, #16] ; 83b8 <deregister_tm_clones+0x2c>

83a4: e3530000 cmp r3, #0

83a8: 012fff1e bxeq lr

83ac: e12fff13 bx r3

83b0: 000107cf andeq r0, r1, pc, asr #15

83b4: 000107cc andeq r0, r1, ip, asr #15

83b8: 00000000 andeq r0, r0, r0

000083bc <register_tm_clones>:

83bc: e59f3024 ldr r3, [pc, #36] ; 83e8 <register_tm_clones+0x2c>

83c0: e59f0024 ldr r0, [pc, #36] ; 83ec <register_tm_clones+0x30>

83c4: e0603003 rsb r3, r0, r3

83c8: e1a03143 asr r3, r3, #2

83cc: e0833fa3 add r3, r3, r3, lsr #31

83d0: e1b010c3 asrs r1, r3, #1

83d4: 012fff1e bxeq lr

83d8: e59f2010 ldr r2, [pc, #16] ; 83f0 <register_tm_clones+0x34>

83dc: e3520000 cmp r2, #0

83e0: 012fff1e bxeq lr

83e4: e12fff12 bx r2

83e8: 000107cc andeq r0, r1, ip, asr #15

83ec: 000107cc andeq r0, r1, ip, asr #15

83f0: 00000000 andeq r0, r0, r0

000083f4 <__do_global_dtors_aux>:

83f4: e92d4010 push {r4, lr}

83f8: e59f4018 ldr r4, [pc, #24] ; 8418 <__do_global_dtors_aux+0x24>

83fc: e5d43000 ldrb r3, [r4]

8400: e3530000 cmp r3, #0

8404: 18bd8010 popne {r4, pc}

8408: ebffffdf bl 838c <deregister_tm_clones>

840c: e3a03001 mov r3, #1

8410: e5c43000 strb r3, [r4]

8414: e8bd8010 pop {r4, pc}

8418: 000107cc andeq r0, r1, ip, asr #15

0000841c <frame_dummy>:

841c: e59f0024 ldr r0, [pc, #36] ; 8448 <frame_dummy+0x2c>

8420: e92d4008 push {r3, lr}

8424: e5903000 ldr r3, [r0]

8428: e3530000 cmp r3, #0

842c: 0a000003 beq 8440 <frame_dummy+0x24>

8430: e59f3014 ldr r3, [pc, #20] ; 844c <frame_dummy+0x30>

8434: e3530000 cmp r3, #0

8438: 0a000000 beq 8440 <frame_dummy+0x24>

843c: e12fff33 blx r3

8440: e8bd4008 pop {r3, lr}

8444: eaffffdc b 83bc <register_tm_clones>

8448: 000106b4 ; <UNDEFINED> instruction: 0x000106b4

844c: 00000000 andeq r0, r0, r0

00008450 <fill_array>:

8450: e52db004 push {fp} ; (str fp, [sp, #-4]!)

8454: e28db000 add fp, sp, #0

8458: e24dd014 sub sp, sp, #20

845c: e50b0010 str r0, [fp, #-16]

8460: e50b1014 str r1, [fp, #-20]

8464: e3a03000 mov r3, #0

8468: e50b3008 str r3, [fp, #-8]

846c: ea000009 b 8498 <fill_array+0x48>

8470: e51b3008 ldr r3, [fp, #-8]

8474: e1a03083 lsl r3, r3, #1

8478: e51b2010 ldr r2, [fp, #-16]

847c: e0823003 add r3, r2, r3

8480: e51b2008 ldr r2, [fp, #-8]

8484: e6ff2072 uxth r2, r2

8488: e1c320b0 strh r2, [r3]

848c: e51b3008 ldr r3, [fp, #-8]

8490: e2833001 add r3, r3, #1

8494: e50b3008 str r3, [fp, #-8]

8498: e51b2008 ldr r2, [fp, #-8]

849c: e51b3014 ldr r3, [fp, #-20]

84a0: e1520003 cmp r2, r3

84a4: bafffff1 blt 8470 <fill_array+0x20>

84a8: e24bd000 sub sp, fp, #0

84ac: e49db004 pop {fp} ; (ldr fp, [sp], #4)

84b0: e12fff1e bx lr

000084b4 <sum_array>:

84b4: e92d4800 push {fp, lr}

84b8: e28db004 add fp, sp, #4

84bc: e24dd058 sub sp, sp, #88 ; 0x58

84c0: e50b0058 str r0, [fp, #-88] ; 0x58

84c4: e50b105c str r1, [fp, #-92] ; 0x5c

84c8: e3a03000 mov r3, #0

84cc: e14b32b6 strh r3, [fp, #-38] ; 0xffffffda

84d0: e15b32b6 ldrh r3, [fp, #-38] ; 0xffffffda

84d4: ee803bb0 vdup.16 d16, r3

84d8: ed4b0b03 vstr d16, [fp, #-12]

84dc: e51b305c ldr r3, [fp, #-92] ; 0x5c

84e0: e2033003 and r3, r3, #3

84e4: e3530000 cmp r3, #0

84e8: 0a000007 beq 850c <sum_array+0x58>

84ec: e3080670 movw r0, #34416 ; 0x8670

84f0: e3400000 movt r0, #0

84f4: e3081680 movw r1, #34432 ; 0x8680

84f8: e3401000 movt r1, #0

84fc: e3a02015 mov r2, #21

8500: e3083694 movw r3, #34452 ; 0x8694

8504: e3403000 movt r3, #0

8508: ebffff84 bl 8320 <_init+0x50>

850c: ea000012 b 855c <sum_array+0xa8>

8510: e51b3058 ldr r3, [fp, #-88] ; 0x58

8514: e50b302c str r3, [fp, #-44] ; 0x2c

8518: e51b302c ldr r3, [fp, #-44] ; 0x2c

851c: f463074f vld1.16 {d16}, [r3]

8520: ed4b0b05 vstr d16, [fp, #-20] ; 0xffffffec

8524: e51b3058 ldr r3, [fp, #-88] ; 0x58

8528: e2833008 add r3, r3, #8

852c: e50b3058 str r3, [fp, #-88] ; 0x58

8530: ed5b0b03 vldr d16, [fp, #-12]

8534: ed4b0b0d vstr d16, [fp, #-52] ; 0xffffffcc

8538: ed5b0b05 vldr d16, [fp, #-20] ; 0xffffffec

853c: ed4b0b0f vstr d16, [fp, #-60] ; 0xffffffc4

8540: ed5b1b0d vldr d17, [fp, #-52] ; 0xffffffcc

8544: ed5b0b0f vldr d16, [fp, #-60] ; 0xffffffc4

8548: f25108a0 vadd.i16 d16, d17, d16

854c: ed4b0b03 vstr d16, [fp, #-12]

8550: e51b305c ldr r3, [fp, #-92] ; 0x5c

8554: e2433004 sub r3, r3, #4

8558: e50b305c str r3, [fp, #-92] ; 0x5c

855c: e51b305c ldr r3, [fp, #-92] ; 0x5c

8560: e3530000 cmp r3, #0

8564: 1affffe9 bne 8510 <sum_array+0x5c>

8568: ed5b0b03 vldr d16, [fp, #-12]

856c: ed4b0b11 vstr d16, [fp, #-68] ; 0xffffffbc

8570: ed5b0b11 vldr d16, [fp, #-68] ; 0xffffffbc

8574: f3f40220 vpaddl.s16 d16, d16

8578: ed4b0b07 vstr d16, [fp, #-28] ; 0xffffffe4

857c: ed5b0b07 vldr d16, [fp, #-28] ; 0xffffffe4

8580: ed4b0b13 vstr d16, [fp, #-76] ; 0xffffffb4

8584: ed5b0b13 vldr d16, [fp, #-76] ; 0xffffffb4

8588: f3f80220 vpaddl.s32 d16, d16

858c: ec532b30 vmov r2, r3, d16

8590: e14b22f4 strd r2, [fp, #-36] ; 0xffffffdc

8594: e14b22d4 ldrd r2, [fp, #-36] ; 0xffffffdc

8598: e14b25f4 strd r2, [fp, #-84] ; 0xffffffac

859c: e14b25d4 ldrd r2, [fp, #-84] ; 0xffffffac

85a0: e1a03002 mov r3, r2

85a4: e1a00003 mov r0, r3

85a8: e24bd004 sub sp, fp, #4

85ac: e8bd8800 pop {fp, pc}

000085b0 <main>:

85b0: e92d4800 push {fp, lr}

85b4: e28db004 add fp, sp, #4

85b8: e24dd0c8 sub sp, sp, #200 ; 0xc8

85bc: e24b30cc sub r3, fp, #204 ; 0xcc

85c0: e1a00003 mov r0, r3

85c4: e3a01064 mov r1, #100 ; 0x64

85c8: ebffffa0 bl 8450 <fill_array>

85cc: e24b30cc sub r3, fp, #204 ; 0xcc

85d0: e1a00003 mov r0, r3

85d4: e3a01064 mov r1, #100 ; 0x64

85d8: ebffffb5 bl 84b4 <sum_array>

85dc: e1a03000 mov r3, r0

85e0: e3080688 movw r0, #34440 ; 0x8688

85e4: e3400000 movt r0, #0

85e8: e1a01003 mov r1, r3

85ec: ebffff3f bl 82f0 <_init+0x20>

85f0: e3a03000 mov r3, #0

85f4: e1a00003 mov r0, r3

85f8: e24bd004 sub sp, fp, #4

85fc: e8bd8800 pop {fp, pc}

00008600 <__libc_csu_init>:

8600: e92d45f8 push {r3, r4, r5, r6, r7, r8, sl, lr}

8604: e1a06000 mov r6, r0

8608: e59f5048 ldr r5, [pc, #72] ; 8658 <__libc_csu_init+0x58>

860c: e59fa048 ldr sl, [pc, #72] ; 865c <__libc_csu_init+0x5c>

8610: e08f5005 add r5, pc, r5

8614: e08fa00a add sl, pc, sl

8618: e065a00a rsb sl, r5, sl

861c: e1a07001 mov r7, r1

8620: e1a08002 mov r8, r2

8624: ebffff29 bl 82d0 <_init>

8628: e1b0a14a asrs sl, sl, #2

862c: 08bd85f8 popeq {r3, r4, r5, r6, r7, r8, sl, pc}

8630: e3a04000 mov r4, #0

8634: e4953004 ldr r3, [r5], #4

8638: e1a00006 mov r0, r6

863c: e1a01007 mov r1, r7

8640: e1a02008 mov r2, r8

8644: e2844001 add r4, r4, #1

8648: e12fff33 blx r3

864c: e154000a cmp r4, sl

8650: 1afffff7 bne 8634 <__libc_csu_init+0x34>

8654: e8bd85f8 pop {r3, r4, r5, r6, r7, r8, sl, pc}

8658: 00008094 muleq r0, r4, r0

865c: 00008094 muleq r0, r4, r0

00008660 <__libc_csu_fini>:

8660: e12fff1e bx lr

Disassembly of section .fini:

00008664 <_fini>:

8664: e92d4008 push {r3, lr}

8668: e8bd8008 pop {r3, pc}

Disassembly of section .rodata:

0000866c <_IO_stdin_used>:

866c: 00020001 andeq r0, r2, r1

8670: 7a697328 bvc 1a65318 <__bss_end__+0x1a54b48>

8674: 20252065 eorcs r2, r5, r5, rrx

8678: 3d202934 stccc 9, cr2, [r0, #-208]! ; 0xffffff30

867c: 0030203d eorseq r2, r0, sp, lsr r0

8680: 6e6f656e cdpvs 5, 6, cr6, cr15, cr14, {3}

8684: 0000632e andeq r6, r0, lr, lsr #6

8688: 206d7553 rsbcs r7, sp, r3, asr r5

868c: 20736177 rsbscs r6, r3, r7, ror r1

8690: 000a6425 andeq r6, sl, r5, lsr #8

00008694 <__PRETTY_FUNCTION__.14503>:

8694: 5f6d7573 svcpl 0x006d7573

8698: 61727261 cmnvs r2, r1, ror #4

869c: 00000079 andeq r0, r0, r9, ror r0

Disassembly of section .ARM.exidx:

000086a0 <.ARM.exidx>:

86a0: 7ffffc8c svcvc 0x00fffc8c

86a4: 00000001 andeq r0, r0, r1

Disassembly of section .eh_frame:

000086a8 <__FRAME_END__>:

86a8: 00000000 andeq r0, r0, r0

Disassembly of section .init_array:

000106ac <__frame_dummy_init_array_entry>:

106ac: 0000841c andeq r8, r0, ip, lsl r4

Disassembly of section .fini_array:

000106b0 <__do_global_dtors_aux_fini_array_entry>:

106b0: 000083f4 strdeq r8, [r0], -r4

Disassembly of section .jcr:

000106b4 <__JCR_END__>:

106b4: 00000000 andeq r0, r0, r0

Disassembly of section .dynamic:

000106b8 <_DYNAMIC>:

106b8: 00000001 andeq r0, r0, r1

106bc: 00000001 andeq r0, r0, r1

106c0: 0000000c andeq r0, r0, ip

106c4: 000082d0 ldrdeq r8, [r0], -r0

106c8: 0000000d andeq r0, r0, sp

106cc: 00008664 andeq r8, r0, r4, ror #12

106d0: 00000019 andeq r0, r0, r9, lsl r0

106d4: 000106ac andeq r0, r1, ip, lsr #13

106d8: 0000001b andeq r0, r0, fp, lsl r0

106dc: 00000004 andeq r0, r0, r4

106e0: 0000001a andeq r0, r0, sl, lsl r0

106e4: 000106b0 ; <UNDEFINED> instruction: 0x000106b0

106e8: 0000001c andeq r0, r0, ip, lsl r0

106ec: 00000004 andeq r0, r0, r4

106f0: 00000004 andeq r0, r0, r4

106f4: 00008194 muleq r0, r4, r1

106f8: 00000005 andeq r0, r0, r5

106fc: 00008220 andeq r8, r0, r0, lsr #4

10700: 00000006 andeq r0, r0, r6

10704: 000081c0 andeq r8, r0, r0, asr #3

10708: 0000000a andeq r0, r0, sl

1070c: 00000051 andeq r0, r0, r1, asr r0

10710: 0000000b andeq r0, r0, fp

10714: 00000010 andeq r0, r0, r0, lsl r0

10718: 00000015 andeq r0, r0, r5, lsl r0

1071c: 00000000 andeq r0, r0, r0

10720: 00000003 andeq r0, r0, r3

10724: 000107a0 andeq r0, r1, r0, lsr #15

10728: 00000002 andeq r0, r0, r2

1072c: 00000028 andeq r0, r0, r8, lsr #32

10730: 00000014 andeq r0, r0, r4, lsl r0

10734: 00000011 andeq r0, r0, r1, lsl r0

10738: 00000017 andeq r0, r0, r7, lsl r0

1073c: 000082a8 andeq r8, r0, r8, lsr #5

10740: 00000011 andeq r0, r0, r1, lsl r0

10744: 000082a0 andeq r8, r0, r0, lsr #5

10748: 00000012 andeq r0, r0, r2, lsl r0

1074c: 00000008 andeq r0, r0, r8

10750: 00000013 andeq r0, r0, r3, lsl r0

10754: 00000008 andeq r0, r0, r8

10758: 6ffffffe svcvs 0x00fffffe

1075c: 00008280 andeq r8, r0, r0, lsl #5

10760: 6fffffff svcvs 0x00ffffff

10764: 00000001 andeq r0, r0, r1

10768: 6ffffff0 svcvs 0x00fffff0

1076c: 00008272 andeq r8, r0, r2, ror r2

...

Disassembly of section .got:

000107a0 <_GLOBAL_OFFSET_TABLE_>:

107a0: 000106b8 ; <UNDEFINED> instruction: 0x000106b8

...

107ac: 000082dc ldrdeq r8, [r0], -ip

107b0: 000082dc ldrdeq r8, [r0], -ip

107b4: 000082dc ldrdeq r8, [r0], -ip

107b8: 000082dc ldrdeq r8, [r0], -ip

107bc: 000082dc ldrdeq r8, [r0], -ip

107c0: 00000000 andeq r0, r0, r0

Disassembly of section .data:

000107c4 <__data_start>:

107c4: 00000000 andeq r0, r0, r0

000107c8 <__dso_handle>:

107c8: 00000000 andeq r0, r0, r0

Disassembly of section .bss:

000107cc <__bss_start>:

107cc: 00000000 andeq r0, r0, r0

Disassembly of section .comment:

00000000 <.comment>:

0: 3a434347 bcc 10d0d24 <__bss_end__+0x10c0554>

4: 72632820 rsbvc r2, r3, #32, 16 ; 0x200000

8: 7473736f ldrbtvc r7, [r3], #-879 ; 0x36f

c: 2d6c6f6f stclcs 15, cr6, [ip, #-444]! ; 0xfffffe44

10: 6c20474e stcvs 7, cr4, [r0], #-312 ; 0xfffffec8

14: 72616e69 rsbvc r6, r1, #1680 ; 0x690

18: 2e312d6f cdpcs 13, 3, cr2, cr1, cr15, {3}

1c: 312e3331 teqcc lr, r1, lsr r3

20: 382e342d stmdacc lr!, {r0, r2, r3, r5, sl, ip, sp}

24: 3130322d teqcc r0, sp, lsr #4

28: 31302e34 teqcc r0, r4, lsr lr

2c: 4c202d20 stcmi 13, cr2, [r0], #-128 ; 0xffffff80

30: 72616e69 rsbvc r6, r1, #1680 ; 0x690

34: 4347206f movtmi r2, #28783 ; 0x706f

38: 30322043 eorscc r2, r2, r3, asr #32

3c: 312e3331 teqcc lr, r1, lsr r3

40: 34202931 strtcc r2, [r0], #-2353 ; 0x931

44: 332e382e teqcc lr, #3014656 ; 0x2e0000

48: 31303220 teqcc r0, r0, lsr #4

4c: 30313034 eorscc r3, r1, r4, lsr r0

50: 70282036 eorvc r2, r8, r6, lsr r0

54: 65726572 ldrbvs r6, [r2, #-1394]! ; 0x572

58: 7361656c cmnvc r1, #108, 10 ; 0x1b000000

5c: Address 0x0000005c is out of bounds.

Disassembly of section .ARM.attributes:

00000000 <.ARM.attributes>:

0: 00003e41 andeq r3, r0, r1, asr #28

4: 61656100 cmnvs r5, r0, lsl #2

8: 01006962 tsteq r0, r2, ror #18

c: 00000034 andeq r0, r0, r4, lsr r0

10: 726f4305 rsbvc r4, pc, #335544320 ; 0x14000000

14: 2d786574 cfldr64cs mvdx6, [r8, #-464]! ; 0xfffffe30

18: 06003841 streq r3, [r0], -r1, asr #16

1c: 0841070a stmdaeq r1, {r1, r3, r8, r9, sl}^

20: 0a020901 beq 8242c <__bss_end__+0x71c5c>

24: 12010c03 andne r0, r1, #768 ; 0x300

28: 15011404 strne r1, [r1, #-1028] ; 0x404

2c: 18031701 stmdane r3, {r0, r8, r9, sl, ip}

30: 1a011901 bne 4643c <__bss_end__+0x35c6c>

34: 1c031b02 stcne 11, cr1, [r3], {2}

38: 2c012201 sfmcs f2, 4, [r1], {1}

3c: Address 0x0000003c is out of bounds.

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NEON Intrinsics

ARM NEON은 별도의 어셈블리 명령어로 작동하는 독립적인 하드웨어 이기 때문에

이녀석을 편하게 다루기 위한 일종의 매크로가 존재한다.

NEON 본질이라고 해석하면 되려나?

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0205j/BABGHIFH.html]

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0348c/Badcdfad.html]

[링크 : http://hilbert-space.de/?p=22]

[링크 : http://www.armadeus.com/wiki/index.php?title=NEON_HelloWorld]

[링크 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491h/CIHJBEFE.html]

[링크 : https://gcc.gnu.org/onlinedocs/gcc-4.6.1/gcc/ARM-NEON-Intrinsics.html]

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