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#define UART_ENABLE_UPDATE

#define UART_AUTOBAUD

//#define UART_FIXED_BAUDRATE     115200

#define UART_CLOCK_ENABLE         SYSCTL_RCGCUART_R0

#define UARTx_BASE                UART0_BASE

#define UART_RXPIN_CLOCK_ENABLE   SYSCTL_RCGCGPIO_R0

#define UART_RXPIN_BASE         GPIO_PORTA_BASE

#define UART_RXPIN_PCTL         0x1

#define UART_RXPIN_POS          0

#define UART_TXPIN_CLOCK_ENABLE SYSCTL_RCGCGPIO_R0

#define UART_TXPIN_BASE         GPIO_PORTA_BASE

#define UART_TXPIN_PCTL         0x1

#define UART_TXPIN_POS          1

#define UART_ENABLE_UPDATE

//#define UART_AUTOBAUD

#define UART_FIXED_BAUDRATE     38400

#define UART_CLOCK_ENABLE         SYSCTL_RCGCUART_R1

#define UARTx_BASE                UART1_BASE

#define UART_RXPIN_CLOCK_ENABLE   SYSCTL_RCGCGPIO_R1

#define UART_RXPIN_BASE         GPIO_PORTB_BASE

#define UART_RXPIN_PCTL         0x1

#define UART_RXPIN_POS          0

#define UART_TXPIN_CLOCK_ENABLE SYSCTL_RCGCGPIO_R1

#define UART_TXPIN_BASE         GPIO_PORTB_BASE

#define UART_TXPIN_PCTL         0x1

#define UART_TXPIN_POS          1

void

UARTSend(const uint8_t *pui8Data, uint32_t ui32Size)

{

    //

    // Transmit the number of bytes requested on the UART port.

    //

    GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_2, GPIO_PIN_2);

    Delay(10);

    while(ui32Size--)

    {

        //

        // Make sure that the transmit FIFO is not full.

        //

        while((HWREG(UARTx_BASE + UART_O_FR) & UART_FR_TXFF))

        {

        }

        //

        // Send out the next byte.

        //

        HWREG(UARTx_BASE + UART_O_DR) = *pui8Data++;

    }

    //

    // Wait until the UART is done transmitting.

    //

    UARTFlush();

    GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_2, 0);

    Delay(10);

} 

LR_IROM 0x00001000 0x00040000

{

    ER_IROM 0x00001000 0x00040000

    {

        *.o (RESET, +First)

        * (InRoot$$Sections, +RO)

    }

    RW_IRAM 0x20000000 0x00008000

    {

        ;* (vtable, +First)

        * (+RW, +ZI)

    }

} 

;******************************************************************************

;

; This is the code that gets called when the processor first starts execution

; following a reset event.

;

;******************************************************************************

        EXPORT  Reset_Handler

Reset_Handler

        ;

        ; Enable the floating-point unit.  This must be done here to handle the

        ; case where main() uses floating-point and the function prologue saves

        ; floating-point registers (which will fault if floating-point is not

        ; enabled).  Any configuration of the floating-point unit using

        ; DriverLib APIs must be done here prior to the floating-point unit

        ; being enabled.

        ;

        ; Note that this does not use DriverLib since it might not be included

        ; in this project.

        ;

        MOVW    R0, #0xED88

        MOVT    R0, #0xE000

        LDR     R1, [R0]

        ORR     R1, #0x00F00000

        STR     R1, [R0]

        ;

        ; Call the C library enty point that handles startup.  This will copy

        ; the .data section initializers from flash to SRAM and zero fill the

        ; .bss section.

        ;

        IMPORT  __main

        B       __main 

;******************************************************************************

;

; qs-rgb.sct - Linker configuration file for qs-rgb.

;

; Copyright (c) 2012-2016 Texas Instruments Incorporated.  All rights reserved.

; Software License Agreement

; 

; Texas Instruments (TI) is supplying this software for use solely and

; exclusively on TI's microcontroller products. The software is owned by

; TI and/or its suppliers, and is protected under applicable copyright

; laws. You may not combine this software with "viral" open-source

; software in order to form a larger program.

; 

; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.

; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT

; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR

; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY

; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL

; DAMAGES, FOR ANY REASON WHATSOEVER.

; 

; This is part of revision 2.1.3.156 of the EK-TM4C123GXL Firmware Package.

;

;******************************************************************************

LR_IROM 0x00001000 0x00040000

{

    ;

    ; Specify the Execution Address of the code and the size.

    ;

    ER_IROM 0x00001000 0x00040000

    {

        *.o (RESET, +First)

        * (InRoot$$Sections, +RO)

    }

    ;

    ; Specify the Execution Address of the data area.

    ;

    RW_IRAM 0x20000000 0x00008000

    {

        ;

        ; Uncomment the following line in order to use IntRegister().

        ;

        ;* (vtable, +First)

        * (+RW, +ZI)

    }

} 

//*****************************************************************************

//

// Allows an application to perform in-place data decryption during download.

//

// If hooked, this function will be called on receipt of any new block of

// downloaded firmware image data.  The application must decrypt this data

// in place then return at which point the boot loader will write the data to

// flash.

//

// void MyDecryptionFunc(unsigned char *pucBuffer, unsigned long ulSize);

//

// where:

//

// - pucBuffer points to the first byte of data to be decrypted.

// - ulSize indicates the number of bytes of data at pucBuffer.

//

//*****************************************************************************

//#define BL_DECRYPT_FN_HOOK      MyDecryptionFunc 

uint32_t

CheckForceUpdate(void)

{

#ifdef CHECK_CRC

    uint32_t ui32Retcode;

#endif

#ifdef BL_CHECK_UPDATE_FN_HOOK

    //

    // If the update check function is hooked, call the application to determine

    // how to proceed.

    //

    return(BL_CHECK_UPDATE_FN_HOOK());

#else

    uint32_t *pui32App;

#ifdef ENABLE_UPDATE_CHECK

    g_ui32Forced = 0;

#endif

    //

    // See if the first location is 0xfffffffff or something that does not

    // look like a stack pointer, or if the second location is 0xffffffff or

    // something that does not look like a reset vector.

    //

    pui32App = (uint32_t *)APP_START_ADDRESS;

    if((pui32App[0] == 0xffffffff) ||

       ((pui32App[0] & 0xfff00000) != 0x20000000) ||

       (pui32App[1] == 0xffffffff) ||

       ((pui32App[1] & 0xfff00001) != 0x00000001))

    {

        return(1);

    }

...

} 

armcc --device DLM -o bl_config.inc -E ..\..\boot_loader\bl_config.c 

UART_ENABLE_UPDATE UART_AUTOBAUD  

..\..\boot_loader\bl_link.sct 

//*****************************************************************************

//

// Selects the UART as the port for communicating with the boot loader.

//

// Depends on: None

// Exclusive of: CAN_ENABLE_UPDATE, ENET_ENABLE_UPDATE, I2C_ENABLE_UPDATE,

//               SSI_ENABLE_UPDATE, USB_ENABLE_UPDATE

// Requires: UART_AUTOBAUD or UART_FIXED_BAUDRATE, UART_CLOCK_ENABLE, 

//           UARTx_BASE, UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_BASE, 

//           UART_RXPIN_PCTL, UART_RXPIN_POS, UART_TXPIN_CLOCK_ENABLE,

//           UART_TXPIN_BASE, UART_TXPIN_PCTL and UART_TXPIN_POS

//

//***************************************************************************** 

#define UART_ENABLE_UPDATE

while(!SysCtlPeripheralReady(SYSCTL_PERIPH_HIBERNATE)) ;