altera Nios II, epcs controller

생각을 해보니.. jic는 문제없이 만들어 진건데...

platform designer에서 EPCS Controller를 추가하지 않아서 작동하지 않는게 아닌가? 라는 생각이 든다.

다시 추가해서 시도해봐야겠다.

EPCS Controller-Based Boot Copier EPCS controller-based boot copier supports EPCS memory only. Boot copier is stored in the ROM within the EPCS flash controller. The boot copier is included during Qsys and Quartus Prime project compila‐ tion time. The next stage boot image is located in the EPCS memory flash. The EPCS controller-based boot copier is automatically appended into the SREC image (*.flash) file during the elf2flash utility execution in the Nios II Flash Programming flow method.

[링크 : https://www.altera.com/en_US/pdfs/literature/ug/niosii_generic_booting_methods.pdf]

My first Nios II 문서에 있는거랑 구성이 거의 비슷한데 EPCS와 SDRAM Controller가 추가되어 있다.

My application contains: 1. Clock Source 2. Nios II Processor 3. System ID 4. JTAG UART 5. EPCS Serial Flash Controller 6. PIO 7. SDRAM Controller

[링크 : https://alteraforum.com/forum/archive/index.php/t-49224.html]

음.. 리셋 벡터까지 EPCS Controller로 해주어야 하나?

Make sure the Nios II’s Reset Vector is pointing at EPCS/EPCQ Controller.

[링크 : https://www.altera.com/support/support-resources/knowledge-base/solutions/rd11192013_118.html]