tm4c HibernateEnableExpClk() 차이점

음.. lm3s랑 tm4c driverlib을 보다 보니..

tm4c

static void _HibernateWriteComplete(void) {     //     // Spin until the write complete bit is set.     //     while(!(HWREG(HIB_CTL) & HIB_CTL_WRC))     {     } } void HibernateEnableExpClk(uint32_t ui32HibClk) {     //     // Turn on the clock enable bit.     //     HWREG(HIB_CTL) |= HIB_CTL_CLK32EN;     //     // Wait for write complete following register load (above).     //     _HibernateWriteComplete(); }

코드 분위기를 보아하니.. HibernateEnableExpClk()는 쓰지 말고, 얘를 쓰면 될 듯?

void HibernateClockConfig(uint32_t ui32Config) {     uint32_t ui32HIBCtl;     ASSERT((ui32Config & ~(HIBERNATE_OSC_HIGHDRIVE | HIBERNATE_OSC_LOWDRIVE |                            HIBERNATE_OSC_DISABLE)) == 0);     ui32HIBCtl = HWREG(HIB_CTL);     //     // Clear the current configuration bits.     //     ui32HIBCtl &= ~(HIBERNATE_OSC_HIGHDRIVE | HIBERNATE_OSC_LOWDRIVE |                     HIBERNATE_OSC_LFIOSC | HIBERNATE_OSC_DISABLE);     //     // Set the new configuration bits.     //     ui32HIBCtl |= ui32Config & (HIBERNATE_OSC_HIGHDRIVE |                                 HIBERNATE_OSC_LOWDRIVE |                                 HIBERNATE_OSC_LFIOSC |                                 HIBERNATE_OSC_DISABLE);     //     // Must be sure that the 32KHz clock is enabled if the hibernate is about     // to switch to it.     //     if(ui32Config & HIBERNATE_OSC_LFIOSC)     {         ui32HIBCtl |= HIB_CTL_CLK32EN;     }     //     // Set the hibernation clocking configuration.     //     HWREG(HIB_CTL) = ui32HIBCtl;     //     // Wait for write completion     //     _HibernateWriteComplete();     //     // Write the output clock configuration for devices that support     // controlling the output clocks from the hibernate module.     //     if(HIBERNATE_CLOCK_OUTPUT)     {         HWREG(HIB_CC) = ui32Config & (HIBERNATE_OUT_SYSCLK |                                       HIBERNATE_OUT_ALT1CLK);     } }

lm3s

void HibernateEnableExpClk(unsigned long ulHibClk) {     //     // Turn on the clock enable bit.     //     HWREG(HIB_CTL) |= HIB_CTL_CLK32EN;     //     // For Fury-class devices, compute the number of delay loops that must be     // used to achieve the desired delay for writes to the hibernation     // registers.  This value will be used in calls to SysCtlDelay().     //     if(CLASS_IS_FURY)     {         g_ulWriteDelay = (((ulHibClk / 1000) * DELAY_USECS) /                           (1000L * LOOP_CYCLES));         g_ulWriteDelay++;     } }

tm4c 레지스터

WRC는 WR Complete 확인용인데 여기서 벗어나질 못하네

CLK32EN은.. tm4c 되면서 클럭이 무조건 32k로 바뀌었으니..

+

크리스탈이 발진 안하면 루프를 못 빠져 나오나?

The only time that I know of if the code loops like this is if the 32768Hz clock is not getting started. if this is a custom board can you make sure that the 32768Hz crystal is well mounted/soldered?

[링크 : https://e2e.ti.com/support/microcontrollers/tiva_arm/f/908/t/393107]