stm32 hal rcc flag

대충 보니

BOR Reset(brown out detection reset - 전압 강하로 인한 재기동)

PIN Reset (NRST pin reset - 하드웨어 리셋)

POR Reset (Power on Reset)

SFT Reset (Software Reset)

IWDG1 Reset (Independent Watchdog reset)

WWDG Reset (window Watchdog reset)

#define RCC_FLAG_BORRST                ((uint8_t)0x95) #define RCC_FLAG_PINRST                ((uint8_t)0x96) #define RCC_FLAG_PORRST                ((uint8_t)0x97) #define RCC_FLAG_SFTRST                ((uint8_t)0x98) #define RCC_FLAG_IWDG1RST              ((uint8_t)0x9A) #define RCC_FLAG_WWDG1RST              ((uint8_t)0x9C) #define RCC_FLAG_LPWR1RST              ((uint8_t)0x9E) #define RCC_FLAG_LPWR2RST              ((uint8_t)0x9F)

[링크 : https://community.st.com/t5/stm32-mcus-products/software-reset-flag-sftrstf-in-rcc-csr-register-what-source/td-p/544463]

[링크 : https://community.st.com/t5/stm32-mcus-products/stm32f407-spurious-reset-rcc-flag-pinrst/td-p/147931]

 

저전력 모드 보안 리셋은 멀까?

3.7.2 System reset sources Power-on reset initializes all registers while system reset reinitializes the system except for the debug, part of the RCC and power controller status registers, as well as the backup power domain. A system reset is generated in the following cases: • Power-on reset (pwr_por_rst) • Brownout reset • Low level on NRST pin (external reset) • Independent watchdog 1 (from D1 domain) • Independent watchdog 2 (from D2 domain) • Window watchdog 1 (from D1 domain) • Window watchdog 2 (from D2 domain) • Software reset • Low-power mode security reset • Exit from Standby

[링크 :https://www.st.com/resource/en/datasheet/stm32h757ai.pdf]

 

stop / standby mode 오갈때 뜨는 듯?

A low-power-mode security reset (which is generated when Stop or Standby mode is entered but is prohibited by the option byte configuration)

[링크 : https://www.st.com/content/ccc/resource/training/technical/product_training/group0/81/96/f3/1a/55/d9/40/52/STM32H7-System-Reset_and_clock_control_RCC/files/STM32H7-System-Reset_and_clock_control_RCC.pdf/_jcr_content/translations/en.STM32H7-System-Reset_and_clock_control_RCC.pdf]