cortex-m3 인터럽트 관련 조사

master 인터럽트를 disable 하면 어떻게 작동할까?

우연히 그 타이밍에 발생할 인터럽트가 있었다면.. pending 될까? 아니면 그냥 잊혀지는걸까?

SW-DRL-UG-6288.pdf

13.2.2.3 IntMasterDisable

Disables the processor interrupt.

Prototype:

tBoolean

IntMasterDisable(void)

Description:

Prevents the processor from receiving interrupts. This does not affect the set of interrupts

enabled in the interrupt controller; it just gates the single interrupt from the controller to the

processor.

Note:

Previously, this function had no return value. As such, it was possible to include interrupt.h

and call this function without having included hw_types.h. Now that the return is a

tBoolean, a compiler error will occur in this case. The solution is to include hw_types.h

before including interrupt.h.

Returns:

Returns true if interrupts were already disabled when the function was called or false if they

were initially enabled.

13.2.2.4 IntMasterEnable

Enables the processor interrupt.

Prototype:

tBoolean

IntMasterEnable(void)

Description:

Allows the processor to respond to interrupts. This does not affect the set of interrupts enabled

in the interrupt controller; it just gates the single interrupt from the controller to the processor.

Note:

Previously, this function had no return value. As such, it was possible to include interrupt.h

and call this function without having included hw_types.h. Now that the return is a

tBoolean, a compiler error will occur in this case. The solution is to include hw_types.h

before including interrupt.h.

Returns:

Returns true if interrupts were disabled when the function was called or false if they were

initially enabled.

13.2.2.5 IntPendClear

Unpends an interrupt.

Prototype:

void

IntPendClear(unsigned long ulInterrupt)

Parameters:

ulInterrupt specifies the interrupt to be unpended.

Description:

The specified interrupt is unpended in the interrupt controller. This will cause any previously

generated interrupts that have not been handled yet (due to higher priority interrupts or the

interrupt no having been enabled yet) to be discarded.

Returns:

None.

13.2.2.6 IntPendSet

Pends an interrupt.

Prototype:

void

IntPendSet(unsigned long ulInterrupt)

Parameters:

ulInterrupt specifies the interrupt to be pended.

Description:

The specified interrupt is pended in the interrupt controller. This will cause the interrupt con

troller to execute the corresponding interrupt handler at the next available time, based on the

current interrupt state priorities. For example, if called by a higher priority interrupt handler,

the specified interrupt handler will not be called until after the current interrupt handler has

completed execution. The interrupt must have been enabled for it to be called.

Returns:

None.

interrupt.c

tBoolean

IntMasterEnable(void)

{

    //

    // Enable processor interrupts.

    //

    return(CPUcpsie());

}

tBoolean

IntMasterDisable(void)

{

    //

    // Disable processor interrupts.

    //

    return(CPUcpsid());

}

void

IntEnable(unsigned long ulInterrupt)

{

    //

    // Check the arguments.

    //

    ASSERT(ulInterrupt < NUM_INTERRUPTS);

    //

    // Determine the interrupt to enable.

    //

    if(ulInterrupt == FAULT_MPU)

    {

        //

        // Enable the MemManage interrupt.

        //

        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_MEM;

    }

    else if(ulInterrupt == FAULT_BUS)

    {

        //

        // Enable the bus fault interrupt.

        //

        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_BUS;

    }

    else if(ulInterrupt == FAULT_USAGE)

    {

        //

        // Enable the usage fault interrupt.

        //

        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_USAGE;

    }

    else if(ulInterrupt == FAULT_SYSTICK)

    {

        //

        // Enable the System Tick interrupt.

        //

        HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;

    }

    else if((ulInterrupt >= 16) && (ulInterrupt <= 47))

    {

        //

        // Enable the general interrupt.

        //

        HWREG(NVIC_EN0) = 1 << (ulInterrupt - 16);

    }

    else if(ulInterrupt >= 48)

    {

        //

        // Enable the general interrupt.

        //

        HWREG(NVIC_EN1) = 1 << (ulInterrupt - 48);

    }

}

void

IntDisable(unsigned long ulInterrupt)

{

    //

    // Check the arguments.

    //

    ASSERT(ulInterrupt < NUM_INTERRUPTS);

    //

    // Determine the interrupt to disable.

    //

    if(ulInterrupt == FAULT_MPU)

    {

        //

        // Disable the MemManage interrupt.

        //

        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_MEM);

    }

    else if(ulInterrupt == FAULT_BUS)

    {

        //

        // Disable the bus fault interrupt.

        //

        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_BUS);

    }

    else if(ulInterrupt == FAULT_USAGE)

    {

        //

        // Disable the usage fault interrupt.

        //

        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_USAGE);

    }

    else if(ulInterrupt == FAULT_SYSTICK)

    {

        //

        // Disable the System Tick interrupt.

        //

        HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);

    }

    else if((ulInterrupt >= 16) && (ulInterrupt <= 47))

    {

        //

        // Disable the general interrupt.

        //

        HWREG(NVIC_DIS0) = 1 << (ulInterrupt - 16);

    }

    else if(ulInterrupt >= 48)

    {

        //

        // Disable the general interrupt.

        //

        HWREG(NVIC_DIS1) = 1 << (ulInterrupt - 48);

    }

}

cpsid / cpsie 어셈블리 인스트럭션을 통해서 마스터 인터럽트를 제어한다.

SetEnable() 시에는 EN0를

SetDisable() 시에는 DIS0를 사용한다.

용도를 찾지 못한.. 이 펜딩.. 머지?

[링크 : http://www.ti.com/lit/ds/spms037g/spms037g.pdf]

음.. disabled interrupt를 펜딩으로 상태를 설정한다?

즉, enable/disable/pending 세가지 상태 중 하나만 가능한건가?

Writing 1 to the ISPR bit corresponding to:

an interrupt that is pending has no effect

a disabled interrupt sets the state of that interrupt to pending.

[링크 :http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/Cihjjifh.html]