chisel (Constructing Hardware in a Scala Embedded Language)

embeded/FPGA - ALTERA

chisel (Constructing Hardware in a Scala Embedded Language)

구차니 2026. 10. 16. 23:30

fpga 다루는 언어인가?

scala 라는 언어에 포함 되어있는 하드웨어

import 보이니 먼가 python 같으면서도 var 대신 val 이니 nodel.js 같기도 하고?

import chisel3._

class MyBundle extends Bundle {
  val foo = UInt(4.W)
  val bar = UInt(4.W)
}

class Foo extends Module {
  val bundle = Wire(new MyBundle)
  bundle.foo := 0xc.U
  bundle.bar := 0x3.U
  val uint = bundle.asUInt
  printf(cf"$uint") // 195

  // Test
  assert(uint === 0xc3.U)
}

[링크 : https://www.chisel-lang.org/docs]

[링크 : https://www.chisel-lang.org/]

import chisel3._
import chisel3.util.Counter
import circt.stage.ChiselStage

class Blinky(freq: Int, startOn: Boolean = false) extends Module {
  val io = IO(new Bundle {
    val led0 = Output(Bool())
  })
  // Blink LED every second using Chisel built-in util.Counter
  val led = RegInit(startOn.B)
  val (_, counterWrap) = Counter(true.B, freq / 2)
  when(counterWrap) {
    led := ~led
  }
  io.led0 := led
}

object Main extends App {
  // These lines generate the Verilog output
  println(
    ChiselStage.emitSystemVerilog(
      new Blinky(1000),
      firtoolOpts = Array("-disable-all-randomization", "-strip-debug-info")
    )
  )
}

[링크 : https://github.com/chipsalliance/chisel]

[링크 : https://en.wikipedia.org/wiki/Chisel_(programming_language)]

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