altera - partial reconfigure

 Arria 10 HPS에서만 되는진 찾아봐야 할 듯.

Partial reconfiguration (PR) allows you to reconfigure a portion of the FPGA dynamically, while the remaining FPGA design continues to function

[링크 : https://cdrdv2-public.intel.com/667007/an798-683034-667007.pdf]

 

어째 느낌이 HPS 라인업만 되는 것 같네?

The Intel® Quartus® Prime software supports the PR feature for the Intel® Stratix® V device family and Cyclone® V devices whose part number ends in "SC", for example, 5CGXFC9E6F35I8NSC.

[링크 : https://www.intel.com/content/www/us/en/docs/programmable/683499/18-1/design-planning-for-partial-reconfiguration.html]