Programming/Verilog2018.01.01 08:24

de0-nano 가속도 센서 예제 

예제가 죄다 verilog네 -_- VHDL을 공부하려는 나의 계획은 이렇게 날아 가는건가!!!


// -------------------------------------------------------------------- // Copyright (c) 2011 by Terasic Technologies Inc. // -------------------------------------------------------------------- // // Permission: // // Terasic grants permission to use and modify this code for use // in synthesis for all Terasic Development Boards and Altera Development // Kits made by Terasic. Other use of this code, including the selling // ,duplication, or modification of any portion is strictly prohibited. // // Disclaimer: // // This VHDL/Verilog or C/C++ source code is intended as a design reference // which illustrates how these types of functions can be implemented. // It is the user's responsibility to verify their design for // consistency and functionality through the use of formal // verification methods. Terasic provides no warranty regarding the use // or functionality of this code. // // -------------------------------------------------------------------- // // Terasic Technologies Inc // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, // HsinChu County, Taiwan // 302 // // web: http://www.terasic.com/ // email: support@terasic.com // // -------------------------------------------------------------------- // // Major Functions: G Sensor utilization // // -------------------------------------------------------------------- // // Revision History : // -------------------------------------------------------------------- // Ver :| Author :| Mod. Date :| Changes Made: // V1.0 :| Rosaline Lin :| 02/16/2011 :| Initial Revision // -------------------------------------------------------------------- //======================================================= // This code is generated by Terasic System Builder //======================================================= module DE0_NANO_G_Sensor( //////////// CLOCK ////////// CLOCK_50, //////////// LED ////////// LED, //////////// KEY ////////// KEY, //////////// Accelerometer and EEPROM ////////// G_SENSOR_CS_N, G_SENSOR_INT, I2C_SCLK, I2C_SDAT ); //======================================================= // PARAMETER declarations //======================================================= //======================================================= // PORT declarations //======================================================= //////////// CLOCK ////////// input CLOCK_50; //////////// LED ////////// output [7:0] LED; //////////// KEY ////////// input [1:0] KEY; //////////// Accelerometer and EEPROM ////////// output G_SENSOR_CS_N; input G_SENSOR_INT; output I2C_SCLK; inout I2C_SDAT; //======================================================= // REG/WIRE declarations //======================================================= wire dly_rst; wire spi_clk, spi_clk_out; wire [15:0] data_x; //======================================================= // Structural coding //======================================================= // Reset reset_delay u_reset_delay ( .iRSTN(KEY[0]), .iCLK(CLOCK_50), .oRST(dly_rst)); // PLL spipll u_spipll ( .areset(dly_rst), .inclk0(CLOCK_50), .c0(spi_clk), // 2MHz .c1(spi_clk_out)); // 2MHz phase shift // Initial Setting and Data Read Back spi_ee_config u_spi_ee_config ( .iRSTN(!dly_rst), .iSPI_CLK(spi_clk), .iSPI_CLK_OUT(spi_clk_out), .iG_INT2(G_SENSOR_INT), .oDATA_L(data_x[7:0]), .oDATA_H(data_x[15:8]), .SPI_SDIO(I2C_SDAT), .oSPI_CSN(G_SENSOR_CS_N), .oSPI_CLK(I2C_SCLK)); // LED led_driver u_led_driver ( .iRSTN(!dly_rst), .iCLK(CLOCK_50), .iDIG(data_x[9:0]), .iG_INT2(G_SENSOR_INT), .oLED(LED));  

endmodule 

D:\de-nano\DE0-Nano_v.1.2.3_SystemCD\Demonstration\DE0_NANO_GSensor\DE0_NANO_G_Sensor.v

D:\de-nano\DE0-Nano_v.1.2.3_SystemCD\Demonstration\DE0_NANO_GSensor\v\led_driver.v


module module_name(module_in_outs);

// 일종의 입출력 변수들 정의(타입은 아직 정의하지 않고 이름만 정의


    // module의 핀(?)에 대한 입출력 방향과 타입을 정의

    input pin_name;

    output pin_name2;

    inout pin_name3;


    // 방향 지시자 없는 내부변수 선언

    wire pin_nam4;

    reg [1:0] count;


    // 행위를 정의함 - structural coding 라고 써있음

    assign out = in;


    // 조사필요

   always@(posedge iCLK or negedge iRSTN)

   submodule sub_module_name

   (

      .sub_module_pin(main_module_pin),

   );

// module의 끝

endmodule 


wire랑 reg도 변수 타입이고 그 외에는 int, real 등의 타입도 있다고..

[링크 : http://wiki.vctec.co.kr/devboard/fpga/spartan-3a-fpga-gaebalbodeu--elbert/module]

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