embeded/FPGA2017.12.05 14:50

요즘 막 지름신이 와서

구경하다 중고로운 평화나라에서 DE0-Nano가 있어서 보는데

막 검색을 해보니 흐음... 내가 원하는건 DE0-Nano-SoC 인 듯..

순수 FPGA 공부도 좋긴한데 고민이 되네..

(그래도 조금은 지름신님 물리쳐진듯? ㅋㅋ)


DE0-Nano-SoC Kit/Atlas-SoC Kit 99$/90$

FPGA Device

Altera Cyclone® V SE 5CSEMA4U23C6N device

HPS (Hard Processor System)

925MHz Dual-core ARM Cortex-A9 processor

1GB DDR3 SDRAM (32-bit data bus)

[링크 : https://www.terasic.com.tw/...&CategoryNo=167&No=941&PartNo=2]


DE0-Nano Development and Education Board 79$/71$

Cyclone® IV EP4CE22F17C6N FPGA

22,320 Logic elements (LEs)

32MB SDRAM

2Kb I2C EEPROM 

G-Sensor ADI ADXL345, 3-axis accelerometer with high resolution (13-bit) 

A/D Converter NS ADC128S022, 8-Channel, 12-bit A/D Converter 50 ksps to 200 ksps 

[링크 : http://www.terasic.com.tw/...&CategoryNo=165&No=593&PartNo=2]


[링크 : https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_51001.pdf]

[링크 : https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_51002.pdf]


HPS 라고 해서.. ARM 코어 탑재.

이녀석이 Zynq 대응 버전이라고 보면 될려나?


[링크 : https://www.altera.com/products/fpga/features/cyv-soc-hps.html]


Cyclone 4는 ARM 코어 없다.

[링크 : https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-iv/cyiv-51001.pdf]



+

2017.12.10

음 Cyclone 4에 온칩 메모리?

[링크 : ftp://ftp.altera.com/up/pub/Altera_Material/13.1/Tutorials/DE0-Nano/Using_DE0-Nano_Flash.pdf]


최대 6.4Mb =약 800KB 인데 GX 모델로 가야지 그렇고

Cyclone IV Device Family 

Features The Cyclone IV device family offers the following features: 

■ Low-cost, low-power FPGA fabric: 

■ 6K to 150K logic elements 

■ Up to 6.3 Mb of embedded memory 

■ Up to 360 18 × 18 multipliers for DSP processing intensive applications 

■ Protocol bridging applications for under 1.5 W total power 


모델에 따라서 낮은건 270Kbit 이니까 34KB 부터 시작한다.

[링크 : https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-iv/cyiv-51001.pdf]


SRAM 이지 Flash는 아니었네..

Memory Modes Cyclone IV devices M9K memory blocks allow you to implement fully-synchronous SRAM memory in multiple modes of operation. Cyclone IV devices M9K memory blocks do not support asynchronous (unregistered) memory inputs.  

[링크 : https://www.altera.com/.../cyclone-iv/cyclone4-handbook.pdf]

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